Search for question
Question

Task 6.2: Pipeline

Simulate the flow of the following code if it passes through a pipeline as in the

The lecture is on! To do this, expand the diagram below, which indicates which

Stage each command in which beat goes through:

The pipeline consists (as discussed in the lecture) of the 5 stages of Instruction

Fetch (IF), Instruction Decode (ID), Execute (EX), Memory Access (MA) and Write

Back (WB), Values calculated in the EX phase are only calculated at the end of the WB phase

written back to the register. When a subsequent command is in its EX-phase

this value is required for the calculation, the pipeline must therefore be delayed for so long

(stalled) until the corresponding value has been written back to the register.

Also Iw and sw can only start execution when all source registers for

Are available.

As can be seen in the diagram, register r2 is set to clock 6 (WB of the second command)

written back. Since the add command requires this register, the pipeline must be

be delayed for a long time until r2 is available for execution (EX) in clock 7.

In contrast to the lecture, it is assumed here that a written register value

is only available for reading in the next bar.

1 lw r1.0x1000 (ro)

2 lw r2.0x1004 (ro)

3 add r3, rl, r2

4 sub r4, rl, r2

5 sw r4, 0x100c (ro)

6 sw r3.0x1008 (ro)

7 addi r5, ro, 0x10

8 sub r6, r0, r5

9 sw r5, 0x2000 (1)

10 sw r6.0x2000 (2)

1. Expand the diagram by the required delay!

2. How many cycles does the pipeline have to be delayed for?

3. What acceleration was achieved with the pipeline for this code? Go

You assume that 200 hp are required for one cycle with pipelining. Without

Pipelining takes one cycle and thus an instruction of 800 hp.

4. Rearrange the instructions so that when processing in the pipeline

no delays are needed! The semantics of the program should be

stay the same! This means in concrete terms. At the end of the execution, the registers should

contain the same values and the same values should be written to the memory

have been. What acceleration is being achieved now?

6 Points

1 Point

2 Points

6 Points

Fig: 1