9-4 +4 [35 minutes] 9.7 [33 points] +25V -0% effect)? Hence, compute the systematic input off- set voltage. (e) Find the input common-mode range. [6 points] (f) If the input differential signal is riding on an [6 points] input common-mode voltage of 0 V, what is the maximum allowable output voltage swing in both directions? Hence, find the peak-to-peak ampli- tude of the largest sine-wave signal that can be applied between the two input terminals (without de offset compensation). TREP Rss 9.8 + VDD ls [25 minutes] [22 points] Figure 9.7.1 -2.5 V The current-mirror-loaded CMOS amplifier shown in Fig. 9.7.1 is fabricated in a 0.5-um technology for which V=-Vip = 0.5 V, IVal = 20 V, and Cox =2pCox 200 μA/V2. Transistors Q1 and Q are matched, Q3 and Q4 are matched, and Qs and Q6 are matched. The (W/L) ratios of all devices are selected so that all operate at the same Worl [6 points] (a) Starting from Figure 9.8.1 Q₁ -0% -Vss Q and Acml 1/28m3RSS show that Ad=IVAL/IVOV and CMRR = 2(V1/Vor)² [4 points] (b) To obtain a differential gain of 40 V/V, find the overdrive voltage Vorl at which the transis- tors should be operated. Also, find the resulting CMRR in dB. [6 points] (c) Using a reference current IREF = 200 μA, find the (W/L) required for each of the six transistors. [5 points] (d) With both input terminals grounded, what de voltage occurs at the output (neglecting the Early The two-stage CMOS op amp shown in Fig. 9.8.11 utilizes eight transistors, Q1 to Qs, all having the same channel length L. Transistors Q and 22 are matched and Q3 and 24 are matched. For the process technology utilized, n = 4μp. All transistors have the same Early voltage, WAL- (a) If the width of each of Q1 and 2 is [10 points] denoted W, find the width of each of 3 to Qs in terms of W so that all transistors oper- ate at equal overdrive voltages, and that Q6 conducts a de bias current equal to that sup- plied by Q. Neglect the Early effect for this part. (b) Derive an expression for the overall voltage [12 points] gain in terms of IV and Vorl. Hence, determine the required value of Vorl for the case = 10 V and the voltage gain required is 2500 V/V.

Fig: 1