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  • Q1: Build a logi -eate circuit that imple ments the truth-t able siven b elow: You mayonly use 2-i nput OR, 2-input AND, andfor 1-in put N OT gates:Note = Yo u ma Y use as nany of th ese ates to i nplen ment the f unctionSee Answer
  • Q2:PART 1: SHOW ME ONE GATE FROM EACH OF THESE CHIPS. AND GATE [7408] OR GATE [7432] NOT GATE[7404] NAND [7400] NOR [7402] XOR [7486] PART 2: SKIP PART 3: NOR FROM NAND OR FROM NAND AND FROM NAND NOT FROM NAND XOR FROM NAND PART 4: A. CONNECT ALL 6 NOT GATES ON YOUR 7404 AND SHOW HOW EACH NOT GATE WORKS. B. CALCULATE HOW LONG THE TIME IS FOR EACH SET OF GATES TO GOSee Answer
  • Q3:Task 8 (Using the minimised sum of products expression for Z that you derived in Task 7.1) i) Find a logic expression for Z using only NOR gates. ii) Draw the circuit diagram for this expression using only 2-input NOR gates and 4-input NOR gates. You do not need to show any pin numbers or chip identification.See Answer
  • Q4:Write a longer (400-600 word) description of your sensor that addresses all of the following items. Consider this an educational document - describing the sensor operation, uses, and other items to someone ready to learn more about it. a. What does the sensor measure? What are a few examples use cases where one would need to measure this? b. In what unit or units does the sensor measure? What is a useful range, based on some of the examples you provided above? c. How does the sensor operate? Describe basic operating principles, any underlying physical concepts needed to understand its operation, and all components required to make the sensor function (e.g. transducer(s), power supplies, digitization, etc.). d. What do range, resolution, and accuracy each mean for your specific sensor? e. If your specific sensor did not exist, how else might you measure its target quantity?See Answer
  • Q5:The diagram below shows a JK flip-flop comprising a D-type positive-edge triggered flip-flop, two AND gates, an OR gate and an inverter. By including an extra input ("J" and "K" compared to just "D") the JK provides more opportunities for logic minimisation than the D-type. The JK used to be the preferred flip-flop as it offers better opportunities for logic minimisation. With the advent of high levels of circuit integration this has been eclipsed in popularity by the D-type which offers advantages in terms of reduced design complexity.See Answer
  • Q6:Deduce the sequence generated by the four-stage linear feedback shift register that has a feedback function given by Q2 + Q3 with the initial stages of: Qo=1, Q₁ =1, Q2 =1 and Q3 = 1.See Answer
  • Q7:Design a divide-by-70,000 counter using as many 74HC111 IC chips as needed. a) Show the math involved b) Draw the circuit with all pin's inputs and outputs values. Also label all the pins names from the datasheet.See Answer
  • Q8:1. A causal discrete-time system is described by a linear constant- coefficient difference equation y[n+2]=y[n+1]−0.5y|n]+x[n+1] (a) Obtain the z-tranform of the unit impulse response h[n]. Pro- vide the ROC and the poles and zeros. Is the system BIBO stable? Does the Fourier transform converge in the ROC? (b) Given the initial conditions y [0] = 0 and y[1] = 1, provide the ROC of Y (2) and obtain the output signal y[n] for a unit step input x [n] = u[n] using the partial fraction method for the inverse z- transform. Express y [n] as a real-valued solution using the polar form of a complex number reje = rcos 0 + jrsin 0. Give the steady-state solution of y [n] as n → ∞⁰.See Answer
  • Q9: 2. A continuous-time signal xa (t)=sin2zt+0.1 sin127t is sampled at a sampling frequency 2, 207 rad/sec. A continuous-time double differentiator system is defined as Ye (1) dt² The continuous-time signal xe (t) is processed by a discrete-time system as shown in the following figure. x(1) C/D T x[n] Discrete-time system y[n] D/C T y,(1) (a) Compute the Fourier transforms of the continuous-time signal xe (t) and the continuous-time sampled signal x, (t). Sketch the Fourier transforms of xe (t) and x, (t). Determine all the frequencies of the Fourier transform X, (j2) within the bandwidth 2 <. (b) Determine the Fourier transform of the discrete-time sampled signal x [n] for w<. What is the discrete-time sampled signal x [n]? (c) Obtain the frequency response of the discrete-time system so that it is equivalent to the continuous-time system. Then compute the Fourier transform of the discrete-time output signal y [n]. (d) The continuous-time output signal y, (t) is reconstructed by a reconstruction ideal low-pass filter H, (j). Determine the signal yr (t). Compare y, (t) to ye (t). Are they equal? If not, state the reason why this is the case. (e) If yr (t) is not equal to ye (t), how would you design a re- construction filter H, (j) to recover the desired reconstructed sig- nal yr (t)=ye (t). Sketch the reconstruction filter H, (j). Note that H, (j) needs not be an ideal low-pass filter.See Answer
  • Q10:3. Consider a continuous-time system represented by a delayed low- pass filter defined by the Laplace transform of the unit impulse response He(s) The input signal x (t) is sampled in discrete time and then processed by a discrete-time system represented by the frequency response H (e) as shown in the following figure. x(1) (e) (a) (c) C/D system. T Sice #d s+ Sc Discrete-time system y[n] Compute the unit impulse response he (t) of the continuous-time (b) Compute the unit impulse response h[n] of the discrete-time system by the impulse variance method for ta = 27. D/C ↑ T y, (t) Compute the Fourier transform H (e) for h[n]. Obtain the magnitude and phase expressions. (d) Suppose xc (t) = 2 cos 15t +0.2 sin 30t. The signal is sam- pled with a sampling period T = 100 sec. Determine the discrete-time sampled signal x[n]. Justify your answer. The cutoff frequency of the low-pass filter is 2 = 207 rad/sec. Compute the output signal y [n].See Answer
  • Q11:Assignment for all the students. Design, simulate the following with ADS (with and without parasitics), compare your results. A. 1) Low pass filter: Transmission line filter with pass band edge frequency 900 MHz and characteristics impedance 50 ohms. 2) Butterworth with pass band edge 900 MHz with 1 db attenuation in Pass band, more than 30 db attenuation in stop band 2.7GHz. 3) Chebyshev with pass band ripple 1 db ripple in pass band 900 MHz and more than 30 db attenuation in stop band at 2.7 GHz. B. High Pass Filter same specification as A. C. Band Pass Filter: Same as A with center frequency 900 MHz and bandwidth 200 MHz. D. Band Stop Filter: Same as A with center frequency 900 MHz and bandwidth 200 MHz.See Answer
  • Q12:Question 1 An essential part of a BCD adder is a comparator that compares a 4-bit input vector and outputs a '1' if the input vector is larger than "1001". The truth table for this is given here: . Input vector 0000 0001 . 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Output vector 0 0 0 0 0 0 0 0 0 0 Design a VHDL entity that models this function. The architecture description can be of any type, structural, behavioral, or other (hint: you also can use a "with s select" structure). Simulate your design and show correct beaviour for ALL input vectors. Organize your simulation so that the input vector is displayed in decimal form. Upload the following for this question: Your complete VHDL source code that includes the ENTITY and ARCHITECTURE section A Screenshot of the correct simulation 1 1 1 1 1 1 [25 marks]See Answer
  • Q13:Q2 Give the wing VD code for a fede Mate Machine The source is available on the STARY TIF 30 ENTITY ANG SET BUY TIPE in 12 ik. A PROCESS BEGEN ALEK.COM IF M The STA tutto da je vel y GAYED AND C 15 A set ofe 1. F¹ Te yo MH- ELSE END IF THER sopranje p TT- le might contain tartalet waveforms for the nnnnnn the Vurce in Quarts and defer Pe state sal y for the given Beset, Clock, and agai the walome of the what of the rede is the Car output spected s the figure dSee Answer
  • Q14:Question 3 BILE ->12->0->1->2₂ Design a modulo-13 counter, a counter that counts from 0 to 12 (0->1->2->3. and provide the simulation result. The counter has a two input signals and one output: • Besetn: this signal resets the counter "0000" when Resetn = '0' . Clock: this is the clock input; the counter increases by every positive edge of Clock Z: this is 4-bit vector which outputs the count value Upload the following for this question: Your complete VHDL code that includes the ENTITY and ARCHITECTURE description A screenshot of the simulation result which clearly shows correct behaviour. . . [25 marks]See Answer
  • Q15:Question 4 Design an FSM in VHDL that does the following: . . . ● . . The FSM has three inputs: Besetn, Clock, and w The FSM has one output z Reseto resets the FSM to the starting state if Besetn = '0' The FSM advance to the next state on each rising edge of the clock signal Clock if during four immediately preceding clock cycles the input w was equal to '1'. Otherwise, the value of z is equal to '0' Upload the following: . w is an asynchronous input signal The output signal z is equal to Rosst Clock Your complete VHDL source code, i.e. the ENTITY and ARCHITECTURE description A screenshot of a simulation that shows correct behaviour. Use the following template for the input signals: hh nthuhuh n [25 marks]See Answer
  • Q16:Batch 1: Design a 50 ohm characteristic impedance microstrip of length 5cm and CPW of length 5 cm. Simulate the return loss and insertion loss from 100 MHz to 5 GHz. Fabricate the structure and measure the response with Network analyzer and compare with simulation. Batch 2: Design a microstrip with 120 ohm impedance of length 5 cm with 50 ohm impedance of length 0.5cm at the input and output. Implement the same with CPW. Simulate the return loss and insertion loss from 100 MHz to 5 GHz. Fabricate the structure and measure the response with Network analyzer and compare with simulation. Simulate the return loss and insertion loss from 100 MHz to 5 GHz. Fabricate the structure and measure the response with Network analyzer and compare with simulation. Batch 3 Design a 40 ohm characteristic impedance microstrip of length 5cm with 50 ohm impedance of length 0.5cm at termination. Implement the same with CPW. Batch 1 Design, simulate and fabricate LPF filter using microstrip as specified in assignment I and compare the performance with lumped element components. Use transmission line approach. Batch 2 Design, simulate and fabricate LPF filter using microstrip as specified in assignment I and compare the performance with lumped element components. Use Butterworth approach Batch 3 Design, simulate and fabricate LPF filter using microstrip as specified in assignment I and compare the performance with lumped element components. Use Chebyshev approachSee Answer
  • Q17:1) 2) Assignment on Oscillators Design and simulation: Design a Colpitts oscillator with a oscillation frequency of 70 MHz if possible with maximum output power. Simulate the oscillator with ADS. Determine the harmonics frequency and amplitude with respect to fundamental. Determine the phase noise at 1KHz offset and 10 kHz. Convert the oscillator to a tunable oscillator with a varactor. Design a 800 MHz oscillator with a negative power supply. Simulate with ADS. Determine the harmonics and phase noise. If possible, convert it to a tunable oscillator using varactor. 3) Design a differential LC oscillator at frequency 500MHz. Simulate the response with ADS.See Answer
  • Q18:1. Assignment III Design an BJT based RF amplifier with a gain of 10db at 1.2 GHz with 10V power supply and simulate with ADS. Incorporate the matching network and simulate its performance. Increase the frequency response by adding inductive load preserving pulse shape. Simulate again with ADS. 2. Design a BJT based feed back amplifier with a gain of 10db at 1.2 GHz with 10V power supply. Simulate the performance with ADS. 3. Design a tuned amplifier with a gain of 20db with center frequency 1.2 GHz and band width 100 Mhz. Simulate the performance with ADS.See Answer
  • Q19:ECE301 Digital Design Learning / Prototyping Objectives: Introduction to reading circuit schematics: VCC, GND. Familiarize with 3 specific circuit elements: Light Emitting Diode (LED), Resistor (R), Power supply. Build a simple LED circuit using a 330 Ohm resistor, red LED, and your 3V battery pack. Lab 1 Description: In Lab 1, we will build the circuit shown in Schematic 1. Introduction to breadboard-based prototyping: breadboard, jumpers, power rails, connection rows. 3V LAB1 330 Ω RED LED Schematic 1: This circuit will light up a red Light Emitting Diode (LED). The 3300 (Ohm) resistor serves the purpose of "limiting the current going through the LED. Without this resistor, your LED would burn out. L First of all let us define what "schematic" means. You can think of it as "a connection diagram of circuit elements". In Lab 1, the circuit we will build is depicted in Schematic 1, which shows three circuit elements that are connected to each other in a certain way. These 3 circuit elements are shown below:/n330Ω www 1 RESISTOR Understanding CATHODE ANODE Type Resistor ANODE M T. POWER LED SOURCE the parts required to build Schematic 1: The circuit elements used in Schematic 1 are: 1) a 330 Ohm resistor, 2) a red LED, and 3) a 3V voltage source. The following table summarizes these three elements: Element # CATHODE 3V Value 330 Ω Red 3 V + 2 LED 3 Power source Let us understand the circuit elements in detail: Resistor is a two-terminal circuit element that is primarily used to control voltage/current values. A terminal is the metal "leg" of the circuit element that is used to make an electrical connection. o In Schematic 1, the resistor limits the amount of current flowing through the LED to avoid exposing the LED to a high amount of current, which will destroy the LED. o Resistor values are measured in Ohms, symbolized by the Greek letter Omega (2). Some resistors have higher values than 1000 Ohm; so, instead of calling it 10000, we call it 1k0 (pronounced kilo Ohm). o The resistor used in Schematic 1 is 3300 (330 Ohms), which limits the LED current at 3 mA (milli Amperes). This is a fairly low amount of current, however, it will make the LED will be reasonably bright. Your LED will consume 6 mW (milli Watts) while lit up. o In Schematic 1, we could have called our resistor 0.33kQ, but this is awkward; calling it 3300 is the standard practice. Lights Emitting Diode (LED) is a circuit element that is used to "light up" to indicate something happening, for example, your device in ON, etc. We see LEDS in all electronic devices. They are probably one of the most useful electronic circuit elements. o The reason LEDs are called "Light Emitting Diode", rather than just "Light" is that LEDS are in fact in are in the "diode" circuit element family. The difference between an LED and an actual diode is the fact that the chemical/nstructure of an LED allows it to shine a visible light when current flows through it. Because of this, the circuit symbol of a diode is identical to an LED, with the exception of the additional lightning bolt next to the LED. o The purpose of a diode is to flow the current only in one direction, but not in the other (reverse) direction. Its "arrow" shape shows exactly which direction the current flows in. Both diodes and LEDs share this property of single-directional current flow; if you connect an LED in the opposite direction, the current doesn't flow and your LED doesn't light up. o While lit up, your LED will consume 6 mW (6 milli Watts) of power. Compare this to the old-style incandescent light bulbs, which consume 60 W (60 Watts). Your LED consumes 10,000 times less power! No wonder you can power the LED using a small battery pack! Power source is a circuit element that provides a constant voltage at its two terminals: o vcc is the + terminal that has the "high" voltage. Since our battery pack is 3V, the Vcc terminal is always 3V (three volts); throughout the entire ECE301 course, Vcc will mean 3V. o GND (Ground) is the terminal. This is the point in your circuit that has a voltage level of OV (zero Volts). Note that sometimes we refer to the power source as a "voltage source" or even "energy source". They are interchangeable terms. An energy source stores a certain amount of energy, which continuously loses a portion of the stored energy as you use it to energize your circuit. If you use it long enough it will eventually run out of energy and you will no longer be able to light up your LED. How to setup your battery pack: Take the two AA batteries provided in your lab kit and place them inside your battery pack. Each AA battery has a flat bottom, which is its - terminal and connects to the springy metal. Each AA battery also has a pointy top, which is its + terminal and connects to the non-springy metal. The battery pack has two cables coming out of it: The RED cable is the 3V (the Yçç) The Black cable is the OV (the GND) The ON/OFF switch on top of the battery pack turns OFF the 3V supply when we are not using the circuit. You must turn OFF your battery pack when you are done with your experiment, since this will stop the energy drain on the battery pack; if you forget to turn it OFF, your batteries will drain and you will need 2 new batteries !/nGathering the parts for building Schematic 1: We will need a 3300 resistor, a red LED, and the battery pack to build Schematic 1. You can locate them in your lab kit by following the information below: 3V Battery pack: Your battery pack is designed to provide a constant 3V voltage by serially-connecting two AA batteries inside. Each AA battery has a 1.5 V voltage; connecting two of them in series -inside the battery pack- increases the voltage of the battery pack to 3V. This internal structure of the battery pack is not something we will repeat beyond this lab, since we only care about the fact that the battery pack itself provides 3V. 330 Resistor: Resistors have color coding on them, which allows you to "read" their value by deciphering the color code. Color code of 330Qis: Orange, orange, brown, gold Which translates to: 3300 ±5% 5% tolerance means that the resistance can be in the range [313.5 ... 346.5] Ohms Red LED: We are looking for an LED that has a red color. If you look "inside" the plastic casing of the LED, you will see a distinct pattern. One HIGH ENERGY Understand how to read Resistor Color Code: https://en.wikipedia.org/wiki/ Electronic_color_code# Resistor_code Learn more about LEDS: https://en.wikipedia.org/wiki/Light-emitting_diode RAYOVAC/nof its pins is called the cathode and the other anode. Cathode must be connected to the lower voltage (GND in our case) and it looks like an umbrella over the anode. Building Schematic 1: Now that we have the three parts we need, let us connect them and light up your LED. Before learning best practices, the hard-wiring option shown on the right is a bad way to build Schematic 1. fff As long as the electrical connections of the three parts in Schematic 1 are correct, the LED will light up. So, you could very well get the 3300 resistor, red LED, and the 3V battery pack and connect them as shown on the right. This is the "hard-wired" way of connecting them. The anode of the LED and one terminal of the 3300 resistor are "twisted together" to connect them electrically. They are ruined and you won't be able to use them in the future labs. The "hard-wiring" idea introduced above is terrible! Although hard-wiring will allow you to demonstrate that Schematic 1 works, you just ruined one pin of the LED and the resistor. Our intention is to use the parts in your kit over and over again throughout the entire semester. The right way to build a prototype of Schematic 1 is by using a breadboard (shown below)./nWe will use a breadboard to build Schematic 1. A breadboard is a "prototyping" tool. It can be thought of as a "temporary connection board", which allows you to build a working version of the circuit, demonstrate its functionality, and disconnect everything when done; after this disconnection, all of the original parts are intact and can be used to demonstrate a new circuit. The breadboard prototype of Schematic 1 is shown on the right. Understanding the Breadboard Vcc and GND Supply Rails: Let us now understand how a breadboard works. For now, we will introduce some elementary breadboard principles and will expand on them in the future labs. The most important part of the breadboard is the VCC and GND supply rails. They are indicated by the and signs. The entire rail is connected electrically, supplying 50 (5x10) holes that can connect your devices to the Ground (GND) pin, as shown below. Similarly, the rail provides 50 holes for device terminals that need to be connected to VCS:/nL ***** GND Vcc ***** Additionally, there is a + and on the bottom. 50 pins on the top Vcc rail are connected to each other (the top + rail). 50 pins on the top GND rail are also connected to each other (the top Notice that there is also a VCC and GND rail on the bottom. The top XCC rail and the bottom XCC rail are not connected by default. Similarly, the top GND rail and the bottom GND rail are not connected by default. In Lab 1, we will only work with a single VCC and single GND supply rail. In Lab 2, we will see how we can connect the top and the bottom rails to make longer (100-hole) rails. rail). Understanding the Breadboard General Connections: Although the VCC and GND supply rails are the most important parts of any circuit, there are also many intermediate connections we have to establish. For this, the breadboard has many options. Think of the breadboard as a connection matrix. Excluding the supply rails, all of the other holes in the middle have a (Row, Column) coordinate. Top rows are numbered 1, ..., 5, ..., 60 ... Top columns are numbered A, B, C, D, E./n. L Bottom rows are numbered 1, ..., 5, ..., 60 ... Bottom columns are numbered F, G, H, I, J. Columns A, B, C, D, E of any given row are connected to each other. So, for Row 6, columns A-E are connected; ie., 6A=6B=6C=6D=6E are the same electrical connection! Shown as Top Row 6 below. Every single hole in the Top Row 6 are connected to each other. There are two other random examples shown below; Top Row 1 and Bottom Row 2. No particular reason for choosing any; just randomly chosen. Top Row 1 holes are 1A=1B=1C=1D=1E; these 5 holes are connected to each other. Bottom Row 2 holes are 2F=2G=2H=21=2J. These 5 holes are also connected to each other. There is no connection from the top rows to the bottom rows. In other words, for example, 2A and 2F are completely separate connections. Top Vcc rail Top GND rail сл BCDE GHIJ + Top Row 1 Top Row 6 Bottom Row 2 Bottom Vcc rail Bottom GND rail Understanding the Breadboard Prototype of Schematic 1:/nNow that we understand Vcc and GND rails, as well as the intermediate connections, let us take a close look at the breadboard construction of Schematic 1, which is shown below. The 3V battery pack's red cable (Vcc) is connected to the top Xcc rail and its black cable (GND) is connected to the top GND rail. This will energize our circuit and will bring the + and from the battery into the breadboard. The cathode of the diode is connected to the GND rail (any one of the 50 holes will be fine). One terminal of the 3300 resistor is connected to the Vcc rail (any one of the 50 holes is fine). E + F B C D E EU ΕΠ Looking at Schematic 1, we see that we still need the intermediate connection that connects the second terminal of the 3300 resistor and the anode of the LED. We will use one of the intermediate breadboard connections for this; the question is: which one? The answer is always "whichever one is physically closer to the already existing devices". If we look carefully at the already-made connections to the XCC and GND supply rails, we are pretty close to the top rows (somewhere between RowSee Answer
  • Q20:DESCRIPTION This HWI is for you to practice the prerequisite background knowledge that you may have learned in your previous otses. For example, for this course, it is important for you to know how to convert Decimal to Binary, and Binary to Decimal numbers, know now to obtain different combinations of multiple binary variables etc. You will need to refresh and pick up these concepts quickly from Textbook or from other resources. One exercise can be for you to express the decimal numbers from 0 to 31 in Binary bits for practicing these concepts.See Answer

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