1 consider the circuit shown below we will see that this is a represen
1) Consider the circuit shown below. We will see that this is a representation of Topology 4 of
common-mode feedback, when evaluated for common-mode signals. Assume that all
transistors are biased to have a | Veff|=0.1 V with λ = 0.25 V-¹. The transistors are sized such
that M1-M2 have W/L ratio of 0.5Kn; M3 has W/L ratio of Kp; M4-M5 have W/L ratio of 10kp;
M6-M7 has W/L ratio of 5Kn; and M8-M10 have W/L ratio of Kn. Calculate the following:
a. Loop gain
b. Beta for Vset/Vout
c. Closed-loop gain, Acl = Vout/Vset, including effects of the loop gain
If lambda were doubled, calculate the percent change in loop gain and percent change
in closed-loop gain (i.e., (Xnew-Xold)/Xold x 100%).
Explain why the percentage errors are so different between T and Acl.
Mb 5 kn
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