6-3. An N-MOSFET and a P-MOSFET are fabricated with substrate doping concentration of 6x 10"cm^-3 (P-type substrate for N-MOSFET and N-type substrate for P-MOSFET).The gate oxide thickness is 5 nm.

See Fig. 6-39. (a) Find V of the N-MOSFET when N* poly-Si is used to fabricate the gate electrode. (b) Find V of the P-MOSFET when N* poly-Si is used to fabricate the gate electrode. (c) Find V, of the P-MOSFET when P* poly-Si is used to fabricate the gate electrode. (d) Assume that the only two voltages available on the chip are the supply voltage Vdd= 2.5 V and ground, 0 V. What voltages should be applied to each of the terminals (body, source, drain, and gate) to maximize the source-to-drain current of the N-MOSFET? (e) Repeat part (d) for P-MOSFET. (f) Which of the two transistors (b) or (c) is going to have a higher saturation current.Assuming that the supply voltage is 2.5 V, find the ratio of the saturation current of transistor (c) to that of transistor (b). (g) What is the ratio of the saturation current of transistor (c) to that of transistor (a)?Use the mobility values from Fig. 6-9.