design a serier rlc bandpass filter with a center frequency of 5 khz a
Design a serier RLC bandpass filter with a center frequency of 5 KHz and a quality factor of 5. Use a 2 µF capacitor.
a- Calculate the value of R and L?
b- Use the P Spice to plot the output voltage versus frequency , for (1 <f<1 MHz), Vin =100 Vrms. Mark both cut - off frequencies on the plot and print it. Make sure that you print your name in the polt. then calculate Wc1= Wc2 = C- A 5 Q resistor is connected across the output terminals of the filter (across R). Add this load to your filter and re simulate the program again. Print the new Vout versus frequency polt twith new cutt-off frequencies marked on the plot. fc1 new (pspice)= fc2 new (pspice)= what is the effect of adding resistor in the band width? d- Calculate the percentage change in the band width for the two different cases b&c.
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