Q5. For the K-map shown below in Figure 2: (i) Draw the k-map, mapping the 1s to generate a simplified equation SOP
for the function (F), and (ii) re-draw the k-map, this time mapping the Os to generate a simplified POS. (iii) simulate
the circuit for both SOP and POS in Multisim, then (iv) simulate the circuits by adding NOT gate to the POS output and
generating the truth tables for both. Verify the truth tables are the same.
Q6. The K-map is shown below in Figure 3. Re-draw the K-map in your report, apply and demonstrate the groupings
required to minimise the expressions and then simulate the new reduced circuit using MultiSim.
Fig: 1