### Question 40373

Verified

Very Large Scale Integrated Circuit

a) Compare between Programmable Logic Devices (PLD) (Programmable Logic Array(PLA)/ Programmable Array Logic (PAL)), Field Programmable Gate Array (FPGA), and Application-Specific Integrated Circuits (ASIC). Your comparison should include, but not be limited to:

IC Structure Programmability Time to Market Price Complexity

The comparison essay should not be longer than 300-words, and table/tables,equations, bullet points and schematics can be used.(6 marksl

b)Derive the Boolean expression and define the truth table for the output 'Q' with respect to inputs A, B and C for the logic circuit shown in Figure Q3.

Use the Boolean Algebra to optimize the design in Figure Q3, redraw the new logic circuit, and verify the equivalency.

Draw a schematic diagram for the function 'Z':

Z=\overline{((A . B)+C) . D}

### Question 40372

Verified

Very Large Scale Integrated Circuit

a)Explain in no more than 300 words the difference between the large and the small signal models for a Bipolar Junction Transistor (BJT). Explain why the operating point in l-V characteristics of BJT plays a central role in determination of a signal model. Can this determination be done without the operating point?

b)Draw a schematic of the p-n-p Bipolar Junction Transistor (BJT) fabricated on a silicon substrate as a part of an integrated circuit. Explain your choice of the particularly doped silicon substrate and the order of fabrication steps in an eventual fabrication flow for the p-n-p BJT.

Draw a schematic of so-called Cascode Amplifier and explain how this configuration is related to the three circuit configurations (namely a common-base, a common-emitter,and a common-collector) for a Bipolar Junction Transistor (BJT) to act as an amplifier.Write a comparison of the Cascode Amplifier configuration with respect to the three common configurations with respect to: the voltage gain, the current gain, and the power gain.(6 marks7

d)Describe three applications of the Bipolar-CMOS-DMOS (BCD) power transistor of your choice in a custom chip. Write an essay of no longer than 300 words justifying why the BCD power transistor is an optimal solution for each of the three chip applications selected.

### Question 40371

Verified

Very Large Scale Integrated Circuit

a)Describe in an essay no longer than 400 words your own understanding of a validity of Moore's Law for the digital CMOS transistor scaling. Address the following issues:the dimensions of transistors, the density of transistors, the operational frequency of transistors, the design of digital circuits made of the transistors, the number of cores in a processor, and the cost of the transistors related to the cost of fabrication and to the cost of a technology development.

b)Find at least four technology innovations which had to be introduced into the technology nodes to boost a performance of CMOS transistors in order to meet requirements for digital circuits and thus continue the scaling. Write a maximum of 300words essay to explain the technical reasons for your selected technology innovation.Justify that your technology chosen change is an innovation.18 marksl

c)MOSFET which has a conduction parameter of 50 mAN? and a threshold voltage of0.5 V. If the supply voltage is +15 Vand the load resistor is 365 Q, calculate the values of the resistors required to bias the MOSFET amplifier at 1/3 (VDD).A common source MOSFET amplifier is to be constructed using an n-channel

d)How is a gain (A) in a MOSFET based amplifier related to the input resistance (RIN)and the output resistance (RouT) ?1 morl1