Consider the following sequence of instructions to compute x+y+xy for two parallel vectors V8 and VI. where x in ve and y in VI: addvv.d V2, V, VI multv.d V3, V8, V1 addvv.d V4, V2, V3 Assume that we have a vector processor with one vector multiplication unit whose latency is 7 and one vector addition unit whose latency is 6. Let n=32 represent the length of the vector supported on our processor. The processor has fully-pipelined vector execution units. The vector processor supports chaining. How long would it take the original loop to execute on this processor? a. 32 cycles b. 120 cycles c. 200 cycles d. 52 cycles e. 150 cycles f. 100 cycles g. 48 cycles h.76 cycles L 74 cycles

For a memory system consisting of eight 8K X 8 ROM chips, you need 20 address bits to decode the addresses using one-hot code O True False

For each of the following scenarios, indicate whether you'd choose a STACK, a QUEUE, a LIST,or a TREE in its implementation: (a) A program to receive data that is to be saved and processed in reverse order. (b) A program to keep track of family relationships. (c) A program to keep track of the progress of a knock-out tournament in a sports league. (d) A program to keep track of patients as they check into a medical clinic, assigning patients to doctors on a first-come, first-served basis. (e) A program which enables you to perform undo and redo actions. (f) A program which prioritises assignment submission marking based on timestamp.

4) Compare and contrast microprocessors and micro controllers. List three major components of a computer system. Please provide examples/diagrams/picture with your answer.

Consider the below assembly code and assume that all memory locations below EA=490A0 store values = (35)16, and higher addresses have (45)16 stored. DS=4000; DI=90A0; DX=0000 (initially) MOV AX, 5678 MOV BX, 1232 ADD AX, BX MOV CX, [DI+8] ADD DX, AX The contents of register CX after execution of the above code is: unknown O (A890)16 O (45)16 O (90A8)16 D (4545)16 O (490A8)16

What are the benefits of having virtual memory? Select all that apply.

For an in-order-execution pipeline, the following assembly code has true data dependencies that may cause pipeline stalls True False

Consider the assembly code below, and assume AX initially contains ABCD and CX =1111: MOV BX, 1234 MOV AX, [BX] ADD AX, CX The contents of Register AX after execution of the above code is: a. AX = (ABXX)16 -- x any hex value (0 F) Ob. AX = (xx00)16 --> x is any hex value (0 - F) c. (BCDE)16 O d. AX = (ABCD)16 e. AX = (0000)16%3! Of. unknown

Consider the below assembly code and assume that AX initially contains ABCD: MOV BX, 1234 MOV AX, [BX] MOV AX, BX The contents of Register AX after the execution of the above code is: a. unknown AX = (1234)16 .AX = (ABXX)16 -- x = any hex value (0 - F) .AX (xx00)16--> x is any hex value (0 F)

The number of address bits required to access a 4MB memory on an 8b machine (1 word = 8b) is: O a. 10 b.20 c. none of the listed choices O d. 22 O e. 1K