computer organisation and architecture

Questions & Answers

Question 44774

Verified

Computer Organisation And Architecture

7. (10 points) Consider the reader-writer problem. The following are two potential solution to the problem .Neither of them work. Explain why.

а.Writer code the same as slide 71 of synchronization, reader code as follows:

Question 44773

Verified

Computer Organisation And Architecture

5. (16 points) Consider deadlock avoidance with single resources. Assuming we have 4 process P1,P2, P3, P4. and 4 resources r1, r2, r3, r4. Consider all| 4 processes are writers (i.e. no resources can be shared among processes). Suppose the processes are to acquire and release the release the resources in the following order (and assume the OS has the complete knowledge of the schedule beforehand) – we only show the first 8 requests.

if a request is denied, the process immediately quits and release all resources it is holding/waiting (if any).

if a process have to wait for a resource (if another process is holding it), the avoidance algorithm can still grant the request and allow that process to wait

all waiting queues for each resources are FIFO

a.Draw the resource allocation graph before the first request is made

b. Will the third request (P3 request r3) be granted? Explain your answer using the resource allocation graph.

c. Is there any request after that one that will be denied? If so, show the first request that will be denied and explain why using the resource allocation graph. If not, show the request allocation graph at the of the 8-th request.

Question 44772

Verified

Computer Organisation And Architecture

ts) This question is about space allocation method for files on a magnetic hard drive.

a.Contiguous allocation is a way of allocate blocks to files. However, it can suffer from over or under estimation. Describe one problem that each will cause.

b.Another way of allocation is to used linked blocks. The slides suggest using FAT (file allocation table) to improve the performance. How can FAT improve the performance?

Question 44771

Verified

Computer Organisation And Architecture

2. (8 points) Consider using an SSD for storing student records

a. Explain why updating student records can potentially take significant more time than adding new student records.

b. All operating systems have buffers that store data to be written to the disk until a page of data is filled before writing to the disk (or until the OS explicitly force the buffer to be written). Name two reasons why using buffers are crucial in the case when appending new student records to the file.

Question 40424

Verified

Computer Organisation And Architecture

The computer memory has 15 address lines and uses two 2K X 32 ROM chips and two 8K X 32 RAM chips.

The total number of bits in all RAM chips combined is 16K

o. The data bus is 16 bits

f. Partial address decoding is possible using one-hot encoding

The address bus is 16 bits

The total number of bits in all ROM chips combined is 64K

The total size of all memory chips combined is 80KB

. The data bus is 16 bits

Question 40423

Verified

Computer Organisation And Architecture

Consider the assembly code below, and assume AX initially contains ABCD and CX =1111:

MOV BX, 1234

MOV AX, [BX]

ADD AX, CX

The contents of Register AX after execution of the above code is:

Ob. AX = (xx00)16 --> x is any hex value (0 - F)

e. AX = (0000)16%3!

Of. unknown

a. AX = (ABXX)16 -- x any hex value (0 F)

c. (BCDE)16

O d. AX = (ABCD)16

Question 40422

Verified

Computer Organisation And Architecture

Consider the below assembly code and assume that AX initially contains ABCD:

MOV BX, 1234

MOV AL, [BX]

ADD AL, CL

The contents of Register AX after execution of the above code is:

с. АХ 3D (0000)16

b. unknown

a. AX = (ABCD)16

d. AX = (ABXX)16 - X = any hex value (0 - F)

e. AX = (xx00)16 --> x is any hex value (0 - F)

Question 40421

Verified

Computer Organisation And Architecture

Consider the below assembly code and assume that all memory locations below EA=490A0 store values = (35)16, and higher addresses have (45)16 stored.

DS=4000; DI=90A0; DX=0000 (initially)

MOV AX, 5678

MOV BX, 1232

ADD AX, BX

MOV CX, [DI+8]

The contents of register CX after execution of the above code is:

ADD DX, AX

unknown

O (90A8)16

O (45)16

D (4545)16

O (A890)16

O (490A8)16

Question 40420

Verified

Computer Organisation And Architecture

For a memory system consisting of eight 1KX 16 ROM chips, you need at least 13 address bits to ensure correct address decoding?

O True

OFalse

Question 40419

Verified

Computer Organisation And Architecture

For a memory system consisting of eight 1K X 16 ROM chips, you need no more than 16 address bits to ensure correct address decoding using one-hot code?

True

False

No Search results found!

Kindly submit your queries
we will make sure available to you as soon as possible.

Search Other Question


Submit query

Getting answers to your urgent problems is simple. Submit your query in the given box and get answers Instantly.

Submit a new Query

Please Add files or description to proceed

Success

Assignment is successfully created

News & Offers


  • Offers
  • Flash sale on now! Get 20% off until 25th June, online at TutorBin. Use discount code ALK&8JH at Tutorbin.com/Booking
  • News
  • Latest Blog Published:
    [Blog Name], online at [Time]
  • News
  • Latest Blog Published:
    [Blog Name], online at [Time]