Consider the following sequence of instructions to compute x² + 4x + 1 for each element x in a vector stored in ve. multvv.d V1, ve, ve # V1 = x^2 multvs.d V2, V8, 4 # V2 = 4 x addvv.d V3, V1, V2 addvs.d V4, V3, 1 # V3 = x^2 + 4x #V4 = x^2 + 4x + 1 Assume that we have a vector processor with two vector multiplication unit whose latency is 7 and two vector addition unit whose latency is 6. Let n=32 represent the length of the vector supported on our processor. The processor has fully- pipelined vector execution units. The vector processor supports chaining. How many clock cycles will this instruction sequence take? a. 48 cycles b. 32 cycles 0.c. 52 cycles d. 120 cycles e. 51 cycles f. 100 cycles g. 200 cycles h. 150 cycles 1. 74 cycles
The contents of memory location 3000:0102 in hex are: а. ВВ b. undefined c. 57 Od. 00 e. B2
The computer memory has 15 address lines and uses two 2K X 32 ROM chips and two 8K X 32 RAM chips. The total size of all memory chips combined is 80KB o. The data bus is 16 bits The total number of bits in all RAM chips combined is 16K . The data bus is 16 bits The address bus is 16 bits f. Partial address decoding is possible using one-hot encoding The total number of bits in all ROM chips combined is 64K
11. Consider a magnetic hard disk with a seek time of 8 ms, a data transfer rate of 1Mbyte/second and rotational latency of 3 ms. A disk sector holds 32 Kbytes. What is the average time (in ms) for the disk to serve a request to load 32 Kbytes of data from a disk sector?
For a memory system consisting of eight 8K X 8 ROM chips, you need 20 address bits to decode the addresses using one-hot code True O False
The largest number of locations that could be addressed using 12 address lines is: a. 4M b. 4KB c. Undefined d. 1MB Ce. 4K
The Interrupt Vector Table entry containing the address of the ISR for Interrupt #0D is (52)16? O True False
For a memory system consisting of four 2K X 8 ROM chips, you need at least 13 address bits to ensure correct address decoding True False
Explain, in your own words, the appropriate algorithm to calculate the Base R. representation of the positive real number (10.625)10. Provide a pseudocode implementation of the algorithm.
The Interrupt Vector Table entry containing the address of the ISR for Interrupt #04 is (10)16? True False