1) Sketch Ix and the transconductance as a function of Vx. Label and clearly indicate important

voltage values at which the FET transitions from one operating region to another (eg.

saturation, reverse saturation, triode, cutoff), if you don't have enough information to compute

the numerical values please label with a symbolic expression.

Finally, for each operating region give an expression for the small- signal impedance looking

into the drain of M1. Remember our model is not defined and nothing can be graphed when

either the Source-Bulk or Drain -Bulk P-N junctions become forward biased. This is

something that must be avoided in designs.

Ix

+1.9 V

M₁

+1 V

+1.5 V

Vx