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17.5 A logic inverter is implemented using the arrangement of Fig. 16.18 with switches having R=2kQ, VDD = 1.2 V, and V=V=Voo12. (a) Find Vo Von NM, and NM. (b) If v, rises instantaneously from 0 V to +1.2 V and assuming the switches operate instantaneously-that is, at 0, PU opens and PD closes-find an expression for vo(t), assuming that a capacitance C is connected between the output node and ground. Hence find the high-to-low propagation delay (f) for C=0.1 pF. Also find THL (see Fig. 17.3). (c) Repeat (b) for u, falling instantaneously from +1.2 V to 0 V. Again assume that PD opens and PU closes instantaneously. Find an expression for vo(t), and hence find and

Fig: 1