2 a)You are asked to design a synchronous 3-bit counter which will display the following arbitrary, repeating sequence: 0, 2, 4, 5, 6, 7, 0, 2, 4, 5, 6, 7, ...,Your design should use three D-type flip-flops and appropriate logic gates.(Assume that a BCD to seven-segment decoder is used to display the output numbers, but do not include this in your design.) Follow the steps below: i) Convert the numbers in the sequence to binary form, and thus draw a simple state graph showing the sequence in binary form. ii) Draw a simple state table showing only the present and next states of the flip-flops. iii) Construct three Karnaugh maps showing how the next state of each flip-flop relates to the present states of all three flip-flops. Use your Karnaugh maps to derive the next-state equations of the counter (simplified where possible). Use your equations to draw a counter circuit with flip-flops and logic gates.

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