2. For the two-stage CMOS op-amp shown in Fig. 2, all transistors have the same channel

length L = 0.8 μm, Vtn-Vtp = 0.6 V, HaCox=2μpCox 200 μA/V2, and |VA| = 20 V.

Transistors Q5, Q7, and Q8 are matched; Q1 and Q2 are matched, and Q3 and Q4 are

matched. Parts (a) to (d) below deal with dc bias calculations, and in these, assume the

two input terminals are grounded and neglect the Early effect.

(a) Find the values of R, W8, W5, and W7 so that a dc voltage of -1.5 V appears at the

gate of Q5 and dc current of 50 μA flows in the drains of Q1 and Q2.

(b) Find W1 and W2 that will result in Q1 and Q2 operating with an overdrive voltage

of 0.2 V.

(c) Find W3 and W4 that will result in a dc voltage of +1.5 V at the gates of Q3 and Q4.

(d) What de voltage appears at the gate of Q6? Find W6 that will result in zero dc

current flowing through the output terminal of the amplifier.