A microprocessor has an instruction set that consists of 135 instructions, where each instruction consists of opcode and two operands - each operand is 20 bits. Each instruction needs fetch, decode, read operand, execute, write, and interrupt stage Assume that as an average, each stage requires three micro-operations to complete. Also, assume that the control memory is N bits wide (i.e., control field bits + address selection field bits + address bits - N bits). The control field bits are 12, and there are 7 flags to be monitored. a. How many bits are needed in the address field? (3 points) b. What is the size of control buffer register? (3 points) c. What is the size of control address register? (3 points) d. What is the size of control memory, in bytes? (4 points) e. What is the size of instruction register? (3 points) f. In order to change this to two-address format, what parameter(s) are to be changed, and how? (4 points) Consider the following code. Draw a pipeline diagram with total clock cycles needed using instruction pipeline (FI, DI, FO, EI, WO). Assume that system has two memory ports, and A, B, C, D are values stored in memory. Mov RI, B Mov R2, C Sub R4, R1, R2 Mov C, R4 Add R6, R1, R2 Mov R5, D XOR R6, R5, R6

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A microprocessor has an instruction set that consists of 135 instructions, where each instruction consists of opcode and two operands - each operand is 20 bits. Each instruction needs fetch, decode, read operand, execute, write, and interrupt stage Assume that as an average, each stage requires three micro-operations