A synchronous finite state machine (FSM) is described by the state table in Figure 3. Show how redundant states may be found and eliminated to minimize this FSM.2. а)Construct an

implication chart to derive equivalences between states and produce a reduced state table for this FSM.Show your working steps and explain your reasoning for each step. b)Find the Boolean logic required to implement the reducedFSM. Draw the circuit diagram of your solution. Is this a Mealy or Moore machine?