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Consider now a machine with 16-bit virtual addresses and 16-bit physical addresses. The memory is byte-addressable. This machine has a linear (i.e., single-level) page table with a page size of 4 Kbytes. Consider the following C code to be executed on this machine:

Here, array A starts at virtual address 0, and each integer element of array A occupies 4bytes. The size of array A is 2Mbyte (because (1024*512) elements * 4 bytes per element =1024*2048 bytes = 2 Mbyte). 10.1 How many bits in a virtual memory address should be used for the page offset? Give your answer in a base 10 number[] 10.2 Assume the machine does not have a translation look aside buffer (TLB). To execute-the code, how many accesses to the page table are required? 10.3 We now want to add a TLB to speed up virtual memory address translation. What is the minimum number of TLB entries required to ensure no TLB misses for the above code when-accessing array A?

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