Design & Implementation of your student ID number to be displayed on the Altera FPGA Board The aim of this coursework is to develop your ability to design, test, implement and

demonstrate a sequential digital circuit using Altera Quartus II software on the DE2- 115 or the DE10-Lite Board. You are expected to: • Design the circuit using components from the Quartus digital libraries Test the circuit, to check for correct operation • Demonstrate the ID number sequence using the 7-segment LEDs For a pass mark, you will need to display the ID numbers directly on the display. For a merit, you will need to display the numbers sequentially on one 7-segment LED display. For a distinction, you will need to scroll the numbers across all the 7-segment LED displays. You are required to submit a short report detailing your design method, and your design project (using the Archive project function in Quartus) via Blackboard. You should also arrange with the lecturer to demonstrate your designs by 11th January 2024. This demonstration should take no more than 5 minutes. Please note that this is an individual coursework assessment.