Element tasks: Task no. Task#1 [10 marks] Deliverables Design a full wave-controlled rectifier connected to an RL load. The circuit specifications are shown in Table 1. Select the right design parameters according to your last SID number. Record your SID number in the grid below: Record your last SID: For example: 1 2 3 LO 4 5 6 7 (Last SID number) Requirements: Sketch one cycle fully annotated for the followings: 1- Voltage waveform across the load R versus the input voltage. 2- Current waveform across the load R. [4 marks] [4 marks] [2 marks] 3- Voltage across the Thyristor T₁. Note: (No simulation results accepted, calculation and hand sketch only).

Fig: 1