Homework #2 - Part III DESIGN A 3-bit BCD SYNCHRONOUS COUNTER Objective: 3 Bit up/down synchronous Counter Problem Statement: To design and implement 3-bit UP and Down, Controlled UP/Down Synchronous Counter using MS-JK Flip-flop. Inputs: The counter will have one main input "X". When "X" = '1' the counter will up-count, otherwise when "X" = '0', the counter will down-count. Up Counter: The up counter counts binary form 0 to7 i.e. (000 to 111). It counts from small to large number. Its Output goes on increasing as they receive clock pulse Down Counter: This down counter counts binary from 7-0 i.e. (111-000). It counts from large to small number. Its Output goes on increasing as they receive clock pulse • Draw the State Diagram (any representation), State Table, and the Excitation Table of this circuit. • Provide the excitation equations (simplify your circuit using K-maps) • Sketch the circuit.

Fig: 1