Question

(ii) For the following specs, determine the logic circuit capable of implementing the function and then write Verilog codes. For this implementation you are required to use a Full adder

and a 2:1multiplexer along with other combinational logic. Suppose A is a 8 bit binary number, and B and C are each 4 bit numbers. If the odd positions in A have odd number of 1s in total // A[1], A[3], A[5] and A[7] has odd ones total Then Output = A + B Else If the even positions in A have even number of 1s in total // A[0], A[2], A[4] and A[6] has even ones total Output = A - B Example libraries can be found in http://www.techep.csi.cuny.edu/~zhangs/v.html

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