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Name University of California, San Diego Department of Electrical and Computer Engineering ECE 102, Winter 2024 Homework 7 [150 points] ECE 102 - HW7 Important Notes: - HW submission must be submitted as on Canvas >> gradescope. Use gradescope to identify the right pages for solution of each problem. o If the page and problem order are not maintained and graders have had time to find them, graders can choose NOT to grade your HW solution. Add more pages at the end of this paper if necessary and again, remember to number the pages, the problem, and tag it to the right problem when you submit on gradescope. Circle your final answers and put them in the result summary table provided under each question/problem. Where applicable and if necessary, state your assumptions and clearly underline/highlight them. 1 Name Given the circuit below with the following conditions: Ideal voltage source VDD = 5 V, Ideal current source Iref = 10 uA Input voltages: ECE 102 - HW7 ○ V₂ = VCM + να 2 ○ V₁ = να о VCM 2 Common-mode input voltage: VCM = 2 V PMOS: Vt,p = - 0.6 V, μpСox = 40 uA/V², λp=0.02 [1/V] NMOS: Vt,n = 0.4 V, μn Cox = 100 uA/V², λ=0.02 [1/V] All transistors have the same length L = 1 um, except for M1 & M2 with L₁=L2=0.5 um. Width of the transistors: о = W1 W2 W11 = W12 = 8 um ○ = W3 W44 um ○ W5-8 = 2 um W9-10 = 16 um ○ W13-16 = 4 um ୦ = W17-18 16 um M3-4 and M5-10 form a wide-swing cascode current mirror. We will calculate biasing condition for this current mirror below. VDD M15 M17 VP1 M13 VP2 M16 M18 M14 Iref V₁ R₁ Rss S M1 M2 Ro 02 V01 M11 Rp5 D7 Rol M7 M5 N2 M3 VN1 M6 M8 M4 M12 Ro Vo M9 M10 The circuit can be considered to have three cascade gain stages, including the first stage from the input V2-V1 to Vo1, the second stage Vo1 to Vo2, and the output stage Vo2 to Vo. In your solution, you can draw small-signal circuit, if necessary, but it is not required unless specifically stated. 2 Name ECE 102 - HW7 Don't be intimidated by the number of sub-questions below. Similar to Midterm 2, they are actually broken down to sub-questions and put in a specific order to help you analyze this circuit. The goal is that you will remember this method and analysis flow to apply it to analyzing other circuits that you may learn later. 1. [40 pts] DC current and voltage bias In all the calculations below, assume all transistors in saturation and the differential voltage vd = 0. Ignore channel-length modulation in the following calculations. Find the expressions and values of the following parameters: a. Vp1. b. VP2. C. Bias currents ID of M15-M16. d. Bias currents ID of M17-M18 and M11. e. Bias currents ID of M1-M2, and M5-M8. f. Bias currents I of M9-M10 and M12. g. Bias (DC) voltage at Vs h. Bias (DC) voltage at Vo1 2. [35 pts] Voltage swing Find the expressions and values of the following parameters: a. The maximum common-mode input voltage Vcм,max (Hint: to keep M15 and M16 in saturation.) b. VN1, assume all transistors in saturation. c. Minimum VN2 to keep M4 in saturation. Use this VN2 in all following questions where necessary. d. The minimum common-mode input voltage Vcм,min (Hint: to keep M1, M2, and M5-M7 in saturation.) e. Resistance R1. f. The minimum output voltage Vo,min (Hint: to keep M9, M10, and M12 in saturation.) g. The maximum output voltage Vo,max (Hint: to keep M12, M17, and M18 in saturation.) Do not ignore channel length modulation in the following questions. 3. [35 pts] Small-signal parameters You are allowed to make reasonable approximations where appropriate, for example Rx//Ry Rx if Rx<<Ry or Ry>10* Rx, and all transistors in saturation. Find the expressions and values of the following parameters: a. gm1,2. b. gm11, and gm12. c. Resistances: RD5 and RD7. d. Tail resistance: Rss. e. Output resistances: Ro1,dm, when consider the circuit in differential mode. f. Output resistances: Ro1,cm, when consider the circuit in common mode. ≈2 3 Name ECE 102 - HW7 g. Output resistances: Ro. 4. [40 pts] Small-signal analysis Find the expressions and values of the following gains. a. Find the small-signal gain A√3 = Vo/Vo2. b. Find the small-signal gain Av2 = Vo2/Vo1. c. Draw the half-circuit model of the first stage gain in common mode from V2=V1=Vcm to Vo1. d. Find the small-signal common-mode voltage gain Av1,cm = V01/Vcm. e. Find the overall common-mode voltage gain Av,cm = Vo/Vcm. f. Draw the half-circuit model of the first stage gain in differential mode from v²-V₁ to V01. g. Find the small-signal differential-mode voltage gain Av1,d = V01/Vd. h. Find the overall differential-mode voltage gain Av,d = Vo/Vd. 4