only mismatch is that between gl and gm2 with Agm/gm=0.01. [3 points] (c) If the Wilson mirror is replaced with a simple current mirror, what does the CMRR become? 9-2 (h) With the two input terminals grounded, cal- [5 points] culate the value of the worst-case differential de voltage at the output resulting from the resistances Rc having finite tolerances of ±1%. Hence, find the input offset voltage of the original amplifier (i.c., the one without RE's). [38 minutes] 9.3 130 points] +5 V R Vid 이 Figure 9.3.1 -5V +5V Rc Q 9.4 Vcc +2.5 V [25 minutes] [20 points] +2.5 V 00 1 Q3 182 For the amplifier in Fig. 9.3.1: (3 points] (a) Assuming 23 and 24 have very high ẞval- ues, determine the value of R that will provide a de current of 0.25 mA for each of Q1 and Q2-1 [2 points] (b) Assuming Q1 and Q2 have very high ẞ val- ues, determine the value of Re that results in a de voltage of +3V at the collectors of Q1 and 2- [5 points] (c) What is the input common-mode range for this differential amplifier? [3 points] (d) Determine the value of the differential voltage gain o/Vid [2 points] (e) Determine the value of the input differential resistance, Rid. Assume B1-B2-100. [5 points] (f) If it is required to raise the value of Rid by factor of 5 by including a resistance Rg in the emitter of each of Q1 and Q2, what value of RE is required? What is the resulting value of the differential gain? [5 points] (g) If the transistors have an Early voltage VA 50 V, calculate the worst-case value of the common-mode gain resulting from the resistances. Rc having finite tolerances of ±1%. Hence, find the value of the CMRR of the original amplifier (i.c., the one without the resistances Rg included). -VER=-2.5 V Figure 9.4.1 For the circuit shown in Fig. 9.4.1, neglect base currents in de calculations and assume that for each transistor VBg=0.7 V. Transistors Q1 and Q2 are perfectly matched. Transistor Q3 has twice the emitter-base junction area of Q4. (a) For 120V, design the circuit to [7 points] establish a de bias current of 0.1 mA in the collec- tor of each of Q1 and 22 and a de voltage of +1 V at the collector of each of 21 and 22. Specify the values required for R, R₁, and R2. (b) For 1/2 and vg2=-va/2, determine [6 points] the differential small-signal voltage gain od/Vid Ignore the Early effect. If B₁ =2=100, what is the differential input resistance of the differential amplifier Q1-22? (c) If Q3 has an Early voltage of 100 V, find [7 points] its output resistance and use this result to deter- mine the common-mode gain of the differential amplifier Vod/cm, where vB₁ =v2 Vic and assuming that each of R1 and R2 is accurate to within ±1%. What is the resulting CMRR in decibels?

Fig: 1