Problem 2. Common-source amplifier with current-source load

For the circuit shown in Fig. 2 VDD = 2.5V, design Vin, Vbiass (W/L) M₁ (W/L) M2 such that

M1¹

(a) DC voltage at VOUT such that 1.2V < VOUT < 1.3V

(b) Small-signal DC gain > 10 or 20dB,

(c) Small-signal gain at 60 MHz > 7.07 or 17dB

(d) Power consumption < 4.5mW