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Sedra Chapter 9 *9.110 Figure P9.110 shows a bipolar op-amp circuit that resembles the CMOS op amp of Fig. 9.37. Here, the input differential pair 21-22 is loaded in a current mirror formed by Q and Q. The second stage is formed by the current- source-loaded common-emitter transistor Qs. Unlike the CMOS circuit, here there is an output stage formed by the emitter follower Q. The function of capacitor Ce will be explained later, in Chapter 11. All transistors have 100, V-0.7V, and re-00 +5V 0.4 mA 0.25 mA 26 -5V 0.5 mA Figure P9.110 (a) For inputs grounded and output held at 0 V (by negative feedback, not shown) find the emitter currents of all transistors. (b) Calculate the gain of the amplifier with Ry - 1 k? Figure 9.37 Two-stage CMOS op-amp configuration +1/00 Q b D D

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