Task 7.3

Draw the logic circuit corresponding to the minimised NAND-NAND function you obtained in

Task 7.2 using SN74AC00N (which has 4 x 2 input NAND gates) and 74HC20N (which has

2 x 4 input NAND gates). As mentioned in the example at the start of the lab, this diagram

should give all the information that is necessary should another person wish to build it on the

NI myDAQ without reference to any other documents. You will lose marks if any information

is not supplied.