) The circuit shown in figure 1 is a 4-bit weighted resistor Digital to Analogue Converter (DAC). (a) Given that the logic inputs eo- e3 have a value of 0V

for logic '0' and +5V for logic '1' and that a full-scale range (FSR) output of -15V is required from the DAC determine values for the resistors Ro. R3.(7 marks) (b) If the actual values of the resistors R0 - R3 were: R0=40k2, R1=16k2, R2=7.28k2,R3=5.72k. Determine the error voltage contributed to the output of the converter due to difference in the theoretical and actual values of the resistor when a logic '1' is applied to that resistor and only that resistor. Hence compile a set of error values in terms of LSB's for each of the bits 0-3.(7marks) (c) Given that your DAC circuit has output errors associated with each bit as shown in Table 1and is still operating with the values given in part (a): (i)Draw a graph (on the graph paper provided) of the output voltage of the DAC as a function of applied digital input value.(5 marks) (ii)Determine if the DAC is monotonic. (iii) Determine the linearity of the DAC. (iv) Determine the differential non-linearity of the DAC.