This challenging question tests your understanding of cache. Consider the following C code:

Assume this program runs on a 32-bit machine, i.e., the CPU loads/stores 4 bytes from memory in one go. This machine has a 16-bit memory address, and each memory block stores 16 bytes. This machine has a direct-mapped data cache with 16 cache lines. Array A starts at address 0, and B starts at address 256 - both arrays begin at a memory block boundary. Each element of arrays A and B occupies 4 bytes. The values of i, j, and mare stored in CPU registers. A compulsory cache miss happens the first time the CPU reads any bytes in a memory block. Such cache misses are inevitable, and the entire memory block must be brought into-the cache. How many compulsory misses in the data cache will occur when running the above code? What is the total number of data cache misses (including compulsory misses) when running the above code? Assume we change the cache configuration to be 2-way set-associative. This new data cache has 8 sets and 16 bytes per line. The cache uses a Least Recently Used (LRU)replacement policy. How many data cache misses (including compulsory misses) will occur when running the-above code with this new data cache design?