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Recently Asked Analog Electronics Questions

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Q1: Department of Electrical Engineering and Electronics ELEC171 Project Practice activity 2: Using Integrated Circuits (IC) Overview The main aim of this activity is to give you some experience of setting up an integrated circuit (IC) chip, because you will need these in your robot car project. Integrated circuits are components that contains a particular circuit already made, which you as a user can access with one or more inputs, and one or more outputs. You are probably already familiar with the most complicated examples of these chips, namely the processor chip in your phone or computer, made by Intel or some other company. Most of the ICs that you will see in the lab will be much simpler than this: chips that are made with just one specific circuit in them. One feature of ICs is that they contain many components inside them - perhaps a complicated combination of resistors, capacitors, transistors, and diodes. You, however, don't have to wire those components yourself - all that is done for you inside the IC. You just have to connect the appropriate inputs, and the IC will generate the appropriate outputs. The reason you are testing ICs is because these will be incredibly useful in your robot car project. You will have to use at least one type of IC and probably several of them, depending on your design. There are different types of ICs that might be useful to you. In this activity, you will test 3 different types. The specific aims of this activity are as follows: ● to give you experience of using several different types of integrated circuits to give you experience of using a comparator IC, which is an essential part of most sensor circuits to give you experience of using a voltage regulator IC, which allows you to control the DC voltage used in different parts of your robot car circuitry to give you experience of using a H-bridge IC, which will be useful in controlling the motors in your robot car. Activity Specifications Activity name Suggested study time Assessment Submission deadline Submission format Late submission Resit opportunity Marking policy Anonymous marking Feedback Using integrating circuits 5 hours Lab notes for the three practice activities will be assessed together. In total, this will contribute 30% of your project mark. Lab notes due on Online via Canvas Standard university penalty applies August resit period Marked and moderated independently Yes via Canvas / Turnitin Feedback Studio 1 Assessment The assessment of this activity consists only of your lab notes for the three Project Practice Activities, which are scheduled for the first 3 weeks of the semester. ● ● Your lab notes must be uploaded to Canvas on your lab day in Week 3 of the semester, after the 3rd practice activity. The dates are depending on your lab day. You should upload your notes as a single pdf file. You should scan your notes after your complete the 3rd practice activity and submit this pdf file. Your marks for the lab notes will comprise 30% of your mark for the ELEC171 project. The marking guidance for these laboratory notes is the same as for the laboratory notes marked in Semester 1. You can find the marking guidance and marking criteria on the module website. 2 Part 1: Background: ICs and components 1.1: Identifying your components You will use several ICs for this activity. You might have a kit of parts with the ICs already in it, or you might have to collect the ICs from the technician's area. When you have your components, you should identify each one now, so that you know the correct one to use for each of the circuit activities explained later. Figure 1.1 shows one of these IC chips, called an LM393 chip. The third photo shows the writing on the plastic casing that allows you to identify the chip. Each of the ICs in your kit should have its ID number written in a similar way. 30 ● L293D H-bridge chip 05AHJ803 Figure 1.1: Three different photos of a LM393 chip, showing the chip itself, the chip inserted into a test board, and a close up of the identifying information written on the plastic case. O 3934 Go through the part list below and check that you can match each component with one of the parts on your desk. If you don't have one of these components, you should be able to collect it from the technician's area. 7805 voltage regulator LM2940 voltage regulator LM393 comparator chip a variable resistor you should already have one of these in your kit. If you do not have one, you should take a 1k variable resistor from the resistors/capacitors cupboard in the lab. 3 2.1: Background Part 2: Testing a comparator IC The aim of this activity is to give you some experience of using a comparator circuit. Using an IC that contains comparator circuits, you will set up the chip on your test board, attach some inputs, measure the outputs, and see how this type of chip could be useful for your robot car design. The purpose of a comparator circuit is simple. The circuit has two inputs and one output. The circuit compares the two input voltages and gives an output voltage that is different depending on which input is larger. When used in a practical circuit, the two input voltages usually are: a reference signal for which you know the voltage a test signal with unknown magnitude. i. ii. If the test signal is larger than the reference voltage, then the circuit output is a (pre-set) high voltage. If the unknown signal is lower than the reference voltage, then the circuit output is a (pre-set) low voltage that is usually zero. Figure 2.1 contains several different representations of a comparator. The first image shows the principle, with two input voltages V₁ and V₂, and an output voltage Vout. The circuit itself (which you should remember is composed of many components set up inside the IC) is represented by the triangular shape. The second image shows the same circuit, but with the two supply voltages that are needed to make the IC work. As already mentioned, the IC is a circuit, and all ICs require you to power the circuit by connecting a power supply. In a circuit diagram, the power supply connections are indicated as shown in the figure, with connectors for Vcc and VEE. For the comparator circuit, these voltages should be a positive voltage for Vcc and a ground connection for VEE. The third image shows a more complete circuit that contains a comparator that compares V₁ and V₂ and then generates the appropriate output. Figure 2.1: (a) a simple diagram showing the principle of the comparator; (b) a more complete diagram that shows that the comparator circuit has to be powered by two supply voltages (VEE is usually zero); (c) a circuit diagram showing a comparator in use. In this case, the comparator is powered by 5 V supply voltage, and should give an output of 5V or 0 V, depending on the relative values of V₁ and V₂. V₁ V₂ (a) + Vcc=5 Vo- V₁ VEE=0 V o V₂ Vout + (c) V₁ O V₂ (b) R₁ + +V cc Vo out VEE Vout 4 2.2 Identifying the parts of your comparator chip You have been given an integrated circuit called a LM393 chip. This chip contains two identical comparator circuits. You can choose to use only one of the comparator circuits, or both. Figure 2.2(a) is an image from the technical data sheet for this integrated circuit. You can see that the connections to the IC, each of which corresponds to one metal leg of the plastic casing, are labelled in a particular way. 1OUT 1 1IN-2 1IN+ 3 GND 4 8 Vcc 7 2OUT 62IN- 5 2IN+ Vout V₂0 V₁0 all VEE=0 V 1OUT 1 1IN-2 3 1IN+ GND 4 8 Vcc 7 20UT 621N- 521N+ Vcc=5 V (a) (b) Figure 2.2: (a) a schematic of the LM393 comparator chip, taken from the technical data sheet; (b) a diagram showing how you might wire up the chip in a real circuit. This IC has eight pins. Pins 8 and 4 are used to connect the voltage supply. These pins must be connected to make the internal circuitry of the IC function properly. The other 6 pins are used for the comparator circuits. Pins 1-3 are used for one circuit, and Pins 5-7 are used for the other comparator circuit. Figure 2.2(b) shows how the first comparator on the chip should be wired up in a practical circuit. (Note that the input pins are labelled "+" and "-". You must take notice of details like this. 2.3 Setting up a comparator circuit The aim of this activity is to wire up this IC and carry out a few tests to confirm your understanding of how a comparator works. For the tests below, you will need to set up the IC on your test board. Figure 2.3(a) shows the best way to mount the chip on the test board, with legs on either side of the central blank region. This arrangement allows you to connect different wires to all the different legs. When you set up the IC, you need to make sure you know the orientation of the IC on the board. The chip shown in the figure has a little circle to help you keep the chip in the right direction. Most chips have something like this. (Another common indicator is a semi-circular notch in one end of the plastic case. Some of the other ICs in your kit have this type of indicator.) The aim of this experiment is to build and test the circuit in Figure 2.3(b). You should follow the steps below, and keep a record of your experiment in your lab notebook. Construct the circuit in Figure 2.3(b) with Vcc = 5 V, and R₁ = 470 . You will need to use the different outputs of your DC power supply to set up this circuit. Use the constant 5 V output for Vcc and VEE, and the two variable voltage outputs for V₁ and V₂ 5See Answer
Q2:Problem 5. [20 pts] Simulation Simulate the circuit in Problem 3 in HW2 and show the screen-capture results of bias, and gain for VG/Vsig, Vo/VG, and vo/v'sig. R=100KΩ O RGI 3ΜΩ m CIF V sig . RG2 6MQ VDD=3.3V G C3 HD RD ΙΚΩ D Beside the parameters on the schematic, given: S Rs 1.2ΚΩ In this simulation, you would need to do the following: C2 the length of all the transistor L = 4 um. Vt,n=0.48 V, μnCox = 90 UA/V² V₂ Set all the capacitors to very large value, for example, 1 F. R₁ ΙΚΩ In LTspice you should put only "1" in the cap value because F (Farad) is already the default unit of capacitance. If you add "1 F" in the value, LTspice will interpret it as 1 ff which is too small. For Vsig, use a voltage source with AC Amplitude value set to 1.See Answer
Q3:Problem 4. [30 pts] Resistance calculation VDD IB VD M1 R r₁ B VDD IB VD M1 R 1₂ C1 VB DD IB VD M1 R T3 Reference Added subject Comment OL Given three different circuits above with resistor R, transistor M1 (gm1, ro1) and a positive current bias IB and positive bias voltage VB such that M1 is in saturation. Also assume that C1 is very large that it can be considered as DC block, but a signal short. Draw small signal models of the circuits and find the expressions for r₁, r2, and r³.See Answer
Q4:Problem 1. [20 pts] Transistor in a special connection Given the circuit below with the following parameters: - M1: Vt,n=0.48 V, unCox 90 uA/V², W/L = 10 um/4 um, λ = 0.01 [1/V] = VDD+Vdd - Supply voltage: VDD = 3.3 V, vdd = 10 mV IDI R VO M1 a. Find the value of resistor R so that the bias current is 10uA. (Hint: Channel length modulation should be considered.) Use the resistor value in (a) for the following calculations: b. What configuration (connection) M1 is having? What region is it in? d. c. Find the transistor small-signal model parameters: gm, ro and rp1. Find the expression and value for the small-signal transfer function (gain) of vo/vdd.See Answer
Q5:s. [15% ] Use an op amp with an open loop gain of 100 dB (10³ V/V) to build an inverting amplifier with R1-1k and R2-1000 k. Using -R2/RI (assuming ideal case), the gain is -1000 V/V. How large is the real gain considering the finite open loop gain?See Answer
Q6:1. [25%] Let's consider an accelerometer. When the acceleration is 0.1 g (g is the earth gravity), the output of the sensor is 8 mV. (1) Calculate the sensitivity of the accelerometer. (2) Assuming the sensor is linear, how large is the output when the acceleration is 0.02 g? (3) If the noise of the output is 2 uV, how large is the minimum detectable acceleration? (4) If the largest acceleration that can be measured is 2 g. how large is the dynamic range in dB?See Answer
Q7:[40% ] Consider an op amp having a single-pole, open-loop response with A, -10 and f-10 Hz. Let the op amp be ideal otherwise (infinite input impedance, zero output impedance, etc.). If the op amp wired as a unity-gain buffer, how large is b? (2) At what frequency the loop gain Aß is equal to 1? What is the corresponding phase margin? For the case of a manufacturing error introducing a second pole at 10' Hz. Sketch the bode plot of the open loop gain. What is now the frequency for which Ab-17 What is the corresponding phase margin? For what values of ß is the phase margin 45° or more?See Answer
Q8:[20% ] An noninverting amplifier with nominal gain of 200 V/V employs an op amp having a de gain of 10' and a unity-gain frequency of 10° Hz. What is the 3-dB frequency of the closed-loop amplifier? What is its gain at 10?See Answer
Q9:x [20% ] A particular inverting amplifier with nominal gain of -100 V/V uses an imperfect op amp in conjunction with 100-k2 and 10-M2 resistors. The output voltage is found to be +9.31 V when measured with the input open and +9.09 V with the input grounded. (a) What is the bias current of this amplifier? Assume ll In what direction does it flow? (b) Estimate the value of the input offset voltage Vos. Hint: draw equivalent circuits when the input is open and grounded, respectively. Include both Vos and 1, in the circuits.See Answer
Q10:2 [10% ] Consider the difference amplifier. In the class, we learned that if R2/R1-R4/R3, the common mode gain is zero. Now R2/RI-100, while R4/R3-102. Calculate the common mode gain. Assume the op amp is ideal. Hint: use principle of superposition to calculate Vol and Vo2.See Answer
Q11:Question: We have a thermocouple which has an analogue output voltage range from 0 to 10 mV and we want to connect it to a PC. In order to achieve this we have an ADC with a maximum range from 0 to 5 V. a. Based upon a non-inverting amplifier design an amplifier circuit that can match the thermocouple to the ADC. b. The amplifier available has a non-infinite open loop gain of 107, determine how many bits can have so that this error will not affect the output.See Answer
Q12: ECE 206 Page 1 of 10 Laboratory Goals Apply a signal to a resistive circuit and measure both input and output signals Save a digital copy of the oscilloscope screen to a diskette/file or thumb-drive. Pre-lab / lab reading 0 Familiarize students with the oscilloscope Familiarize students with the function generator 00 Lab: Oscilloscope and Signal Generator Use generator-20-mhz?pm=PL&nid=-536902324.536883183&cc=US&lc=eng From this page select the Manuals(8) Link on the left under By Type of Content. It should be the third item in the list. Agilent 33220A 20 MHz Function/Arbitary Waveform Generator User Guide http://www.keysight.com/en/pd-127539-pn-33220A/function-arbitrary-waveform- 3000X-Series Oscilloscopes User's Guide, English (or language you want) published by Agilent Technologies,. (Copies of this reference book are available in the lab, or at the website) http://www.keysight.com/en/pdx-x201849-pn-DSOX3052A/oscilloscope-500- mhz-2-channels?pm=rsc&nid=-32540.1150202&cc=US&lc=eng Second Link under Manuals on left column under Key Product Information. for the user guide of the DSOX3052A For the DSOX3032T user manual, User's Guide for InfinitVision 3000T X-Series Oscilloscopes, find the second link under Manuals about 1/2 way down the left side of the page. http://www.keysight.com/en/pdx-x202174-pn-DSOX3032T/oscilloscope-350- mhz-2-analog-channels?pm=rsc&nid=-32541.1150351&cc=US&lc=eng Equipment needed Lab notebook, pen □ Agilent/Keysight DSOX3052A Digital Storage Oscilloscope or Agilent/Keysight DSOX3032T Digital Storage Oscilloscope Circuit Prototyping breadboard/ELVIS Agilent/Keysight 33220A Function/Arbitrary Waveform Generator 2 oscilloscope probes 1 BNC/EZ Hook test lead Parts needed ECE 206 Page 2 of 10 0 ☐ Lab safety concerns 0 Resistors (2), 1.5k Ohm, ¼ Watt Zener diode, 1N4728, 3.3VDC (See TA or Instructor) 0 Lab: Oscilloscope and Signal Generator Use Make sure before you apply an input signal to a circuit, all connections are correct, and no shorted wires exist. 1. Exploring the Oscilloscope Do not short the function generator signal and ground connections together. Do not touch the circuit wiring while power is applied to it. Locate the Digital Oscilloscope and obtain two scope probes. Press the white POWER button to turn on the oscilloscope on the lower left of the front panel. See 1 in Figure 1: Oscilloscope Controls. Press the [Help] button. Familiarize yourself with how the controls are changed using the dials, buttons, or softkeys. The [Help] button is in the lower right of the manual controls area. See 2 in Figure 1: Oscilloscope Controls. Press the Default Setup to return the oscilloscope to the default state (Always use the default before you begin using the oscilloscope!) See 3 in Figure 1: Oscilloscope Controls Connect the two probes to their input connectors, marked as 1 or X and 2 or Y on the Scope. See 4 in Figure 1: Oscilloscope Controls. Clip the channel 1 (CH 1) probe to the Probe Comp test point at the lower right below the display. The probe tip goes to the Probe Comp (5). See 5 in Figure 1: Oscilloscope Controls. Clip the probe's ground clip to the oscilloscope ground connection to the right of the Probe Comp test point. The ground clip goes to the horizontal grounding strip (6). See 6 in Figure 1: Oscilloscope Controls. Press the Auto-Scale button to acquire the test waveform (i.e., a square wave). See 7 in Figure 1: Oscilloscope Controls. Change the vertical scale of the waveform using the CH 1 Volts/Division knob that is just above the 1, illuminated channel activation button. See 8 in Figure 1: Oscilloscope Controls. ECE 206 Page 3 of 10 0 0 0 0 Lab: Oscilloscope and Signal Generator Use Note the Vertical Scale Readout changing in the upper left of the screen and the displayed waveform changing size as the knob is adjusted. See 1 in Figure 2: Oscilloscope Screen. Change the horizontal scale of the waveform using the Sec/Division knob, left most, top most knob. See 9 in Figure 1: Oscilloscope Controls. Note the Horizontal Scale Readout changing as the knob is adjusted. See 3 in Figure 2: Oscilloscope Screen Press the Auto-Scale button again to resize the waveform Press the [Meas] button. { See 10 in Figure 1: Oscilloscope Controls.} The Frequency and peak to peak voltage of channel 1 automatically appears in the window to the right of the signal window on the display. { See 4 in Figure 2: Oscilloscope Screen.} Additional measurements for selection can be found using the lower soft keys under the Screen. The [TYPE] button.{ See 5 in Figure 2: Oscilloscope Screen.} will produce measurements window on the display, it has a scroll control knob on the right of the screen for selection {See 6 in Figure 2: Oscilloscope Screen} To remove a measurement from the Meas window, use the [Clear Meas], {See 7 in Figure 2: Oscilloscope Screen} Follow the other soft keys that appear. Record the frequency and peak-to-peak voltage (Vpp) of the square wave in your lab notebook Unclip the CH 1 probe and ground clip from the oscilloscope test point and set them aside Clip the channel 2 (CH 2) probe and ground clip to the Probe Comp and ground connections respectively Repeat the frequency and amplitude measurements for the CH 2 waveform Clear the screen measurements as before. Unclip the CH 2 probe and ground clip from the oscilloscope, and set them aside Always test both probes before taking measurements with them! The test signal from the oscilloscope should appear square and symmetrical, with no rounding. ECE 206 Page 4 of 10 KEYSIGHT 11.00V/ 2 Time 10 Type DLC Data Data 4 -10.86ms 000 -8.888ms 0296A950 RMT 5 -6.776ms 0296A950 Data 5 -4.944ms 07F RMT Data -120.Ous 07F 4.192ms OBD RMT 16.376ms OBD Data 8.192ms 000 RMT 4 10.28ms 000 Data 4 Data: DE CAN L-I CAN [Search events found 26 Search S, (CAN) ON-OFF Switch Vertical Scale Readout Back Gen out 1 1.00V/ 2 Time InfiniiVision KEYSIGHT Scroll Lister CAN_L-H SCAN Search events found 26 Search S, (CAN) (4) Gen Search for DSO-X 3052A Mixed Signal Oscilloscope 05 34 F2 14 30 40 00 10 20 DE 65AA 08 50 51 02 53 11 53 0346 280A 19A A6 9E 42 17717 Form ✔All Errors Remote Frame ID (RTR) Data Frame ID (-RTR) Remote or Data Frame 10 Data Frame ID and Data Error Frame Overload Frame Search for All Errors ******Coddodda ID -10.86ms 000 -8.888ms 0296A950 RMT 5 -6.776ms 0296A950 Data -4.944ms 07F RMT Data -120.0us 07F 4.192ms OBD RMT 6.376ms OBD Data 8.192ms 000 RMT 4 10.28ms 000 Data 4 Data:DE DIGITAL Scroll Lister Type DLC Data Data 4 Horizontal Scale Readout 0.0s Type(measurement) USB Connector 11 Search for 200.0%/ CRC Errors 5283 4894 6F1A 6009 4F68 Bits Search for All Errors DIGITAL Lab: Oscilloscope and Signal Generator Use 200.0/ CRC Errors 15283 D5 34 F2 14 4894 30 40 00 10 20 6F1A 6009 DE 4F68 65AA 08 50 51 02 53 11 53.0346 9A A6 9E 42 Remote Frame ID (RTR) Data Frame ID (-RTR) Remote or Data Frame ID Data Frame ID and Data Error Frame All Errors Overload Frame 0.0s 500 MHz 4 GSa/s Stop Bets CAN DC 280A 17717 Form Domo 2 MEGAoom GA 1.15V Acquisition Normal 1.00MSa/s Probe Compensation Connections Channels Stop 10.0.1 10.0.1 1.00.1 1.00:1 Domo 1 CHANGE Measurement Window 4 Figure 1: Oscilloscope Controls CAN 1 1.15V Horizontal Acquisition Normal 1.00MSa/s Channels Trigger 10.0.1 10.0.1 1.00.1 1.00 1 Intensity ~ Y 7 Clear Meas (clear measurement) 1 Horiz Search Trigger Navigate Level - Tools Utility Wave Trigger Horizontal ~ Scope Probe Connection Points Figure 2: Oscilloscope Screen Force Trigger Label Vertical 2 Mode Quick Analyze 1 ~ Push to Horiz Search Trigger Navigate Utility Wave 2 Level - Tools Horizontal Scale 10000 -Measure- Cursors 1MQ2 = 15pF 300 V RMS CAT I A Label Meas Acquire Recall 500 SVRMS Push to Zar Push to Zero Trigger Mode Coupling Analyze Vertical waveform V Help Button Push to Select File Help Cursors 2 Display Print Horizontal Scale Control Cursors Meas 1MQ = 15pF 300 V RMS CAT I A Acquire 500 5 SV RMS Default Setup Waveform Run Stop File Run Control Help Measure Futh to Select Cursors Serial Digital Display Print Math Ref Vertical Scale Single Run Stop Default Setup Push for Fine ~ Push to Zare Run Control Serial Digital Math Ref 6 Selector Knob Single -10 Measure Auto Scale ~ Push for Fine Auto Scale Default Setup 12 Save/Recall Button Push to Zers ECE 206 Page 5 of 10 2. Exploring the Function Generator Putting the Function Generator in a known configuration state: Refer to Figure 3: Function Generator Controls. Locate the Agilent 33220A 20 MHz Function Generator Press the white Power button to turn ON the generator. See 2 in Figure 3: Function Generator Controls. 0 0 Press the [Store/Recall] button to select a stored setup. See 4 in Figure 3: Function Generator Controls. Press the [Set to Defaults] soft-key, then the [Yes] soft-key that appears. See 1 in Figure 3: Function Generator Controls. Selecting an output waveform: You can select a waveform by pressing the button with the corresponding symbol and text button, (sine, square, triangle, or ramp): O O Lab: Oscilloscope and Signal Generator Use Press the [Square] wave button (notice the square wave symbol appears on the right side of the display at the Waveform Indicator) See 3 in Figure 3: Function Generator Controls. You can set the frequency two ways: Direct entry for 33220A, See 1 and 9 in Figure 3: Function Generator Controls. ■ I ■ Dial entry for 33220A, See 1, 6, & 8 in Figure 3: Function Generator Controls. ■ Press the Freq/Period softkey until the desired function is in reverse video (white background dark letters) Then press the number buttons for digit entry Press the (units) multiplier prefix softkey along the bottom of the display. Press the Freq/Period softkey until the desired function is in reverse video(white background dark letters) Highlight the digit to be changed with the unmarked right left keys below the adjusting knob on the right side of the front panel. Turn the Adjusting Knob until the desired number appears on the Display.See Answer
Q13:Question: Below is a circuit that is aimed to prevent any issues with ground loop interference. The amplifier has a CMRR of 100 dB, and Vs = 5 V. Assuming that the Vo,diff ≥ 3 Vo,com, what is the maximum Vgr possible. R₁ transducer Rs Vs transmission line R₁ R₂ Igr + Vgr ground bus Zgr ground impedance- R₂ signal conditioning amplifierSee Answer
Q14:1. Draw and explain the atomic structure of Gallium Arsenide (GaAs)? 2. Explain the working of Zener diode with neat diagram. Determine the diode current (I) for the circuit shown below. Assume D1 is silicon and D2 is germanium. D₁ 2 ΚΩ www R 24V D₂ 3. Determine the voltage across R3 (V) and current (I) for the circuit shown below. All the diodes are made up of Silicon. R1 100 02 ww R2 180C R3 1500 04 4. Draw and explain the working of Full Wave Bridge Rectifier? 5. Draw the circuit diagram using diode and write the truth table of a logic gates whose output will be the logical OR operation of three inputs.See Answer
Q15:Problem 2. [50 pts] Frequency response 2- Cascode amplifier M3 VDD=3.3V 10ux VIN M2 ID2 C2 M4 VE RIN MI Vel The circuit above is similar to the one in Problem 2 with: An additional transistor M4 that have the same size with M1. 。 Bias voltage VB is constant. The Body of M4 is connected to GND, as drawn in the schematic. o Cdb4 = Csb4 = 20 fF, Cgd4 = 10 fF, Cgs4 = 40 fF. • Ignore body effect for M4. All other parameters are the same as in Problem 2. Assume all transistors in saturation. Ignore the channel-length modulation when calculating transistor DC currents but consider channel length modulation in calculations of the transistor output resistances, the gain and time-constant calculations. a. Draw the complete small-signal model of the amplifier with all device capacitors mentioned above. b. Find the low-frequency gain, Av = |Vo/Vsig, in dB, of the amplifier. c. Use the Miller's Theorem and OCTC methods to find the time-constant, t₁, at the Gate of Mi. (Hint: note that the gain from the input to voi is different than that in Problem 2) d. Use the Miller's Theorem and OCTC methods to find the time-constant, t2, at the Drain of Mi (i.e., Vol). (Hint: note that the gain from the input to vol is different than that in Problem 2) e. Use the OCTC method to find the time-constant, t3, at the Drain of M4 (i.e., v.). f. Based on (b), (c), (d) find the 3-dB frequency, fi, in Hz of the amplifier. g. Find the frequency of the zero, fz, in Hz of the amplifier. h. Based on the above analysis, this amplifier has three poles and one zero. Please use piecewise linear method to sketch the magnitude and phase of amplifier on a Bode plot (a semi-log plot). i. In your Bode plot, highlight fu, fz, and 20-logio(Av(joo)) at both f→0 and fz. Also, highlight the slopes of non-horizontal piecewise linear lines. Hint: for (h) and (i), please assume the two poles are almost at the same frequency (i.e., fH) if "max[11,12]/min[11,12] <4”.See Answer
Q16:Problem 1. [50 pts] Frequency response 1-CS amplifier VDD=3.3V M3 HCM2 ID2 Vol RIN 7 C2 M1 Rol 10uA VIN Given an amplifier circuit shown above and the following parameters: - - - PMOS: Vt,p = -0.62 V, μp Cox = 36 UA/V², 1p=0.019 [1/V] NMOS: Vt,n = 0.48 V, Cox = 90 UA/V², 1=0.025 [1/V] Resistor RIN = 20 k (W/L)2=20(W/L)3 (W/L)₁ = 20 Cgd1=Cgd2 = 10 fF. Assume: - All transistors in saturation. - Cgs1 = 40 fF. - Cdb1 = Cdb2 = 20 fF. C2 = 500 FF. - All transistors have the Body shorted to the Source, i.e. you can ignore CSB. Ignore the channel-length modulation when calculating transistor DC currents but consider channel length modulation in calculations of the transistor output resistances, the gain, and time-constant calculations. a. Draw the complete small-signal model of the amplifier with all device capacitors mentioned above. b. Find the low-frequency gain, Av = |Vo/Vsig, in dB, of the amplifier. c. Use the Miller's Theorem and OCTC methods to find the time-constant, t₁, at the Gate of M1. d. Use the Miller's Theorem and OCTC methods to find the time-constant, t2, at the Drain of M₁ (i.e., Vol). e. Based on (c) and (d), find the 3-dB frequency, fн, in Hz of the amplifier. f. Find the frequency of the zero, fz, in Hz of the amplifier. g. Based on the above analysis, this amplifier has two poles and one zero. Please use piecewise linear method to sketch the magnitude of the Bode plot (a log-log plot). h. In your Bode plot, highlight fH, fz, and 20-log10(Av(jo)) at both f→0 and fz. Also, highlight the slopes of non-horizontal piecewise linear lines. Hint: for (g) and (h), please assume the two poles are almost at the same frequency (i.e.,See Answer
Q17:R₁ =41-kn 47KR Vec = 10 47th Rz LOKA RH -1.0k lok 4.7k Hovo a) find dc IE in each transistor b) find de Ve for stage 2 c) find Rin (Seen by Vi) & Rout (Seen Vo Vo d) find VinSee Answer
Q18:Prelab Part 3 In this part, we use an RC circuit together with a comparator to build a simple timer. Figure 9 below shows an RC circuit with a step input of 3 volts at time t = 0. Assume that the initial capacitor voltage is 0 V. In Chapter 7, we will learn the theory for RC circuits. For now, just use the fact that v(t) 3-3e-t/RC V. a) Let C = 220 μF and calculate the value of R required so that the capacitor voltage passes through 2.5 V at time t = 8 seconds. That is, vc (8) = 2.5 V. 3 V t=0 R ww + VC Figure 9. RC step response. The circuit of Figure 10 below shows the RC circuit from Figure 9 connected so that the/ncapacitor voltage appears as the input to a comparator. Note that the input current ip to the Op Amp is very small so that the loading effect on the RC circuit will be negligible. Note also that vref = 2.5 V for the comparator. As usual, we use 3 diodes to model an LED in PSpice. It should be clear that prior to time t = 8, the LED will be off. After time t = 8 the LED will be on. Thus, this circuit acts as a simple timer. The time at which the LED turns on can be adjusted by choosing different values for the resistor R. Put your value of R here. Use nearest standard value from Appendix H of the textbook. 12 230 VI SW Figure 10. Timer circuit. No connection here. 28 AN m xxx | 200 01 DIN 02 DIN 03 DIN We will now do a PSpice simulation of our timer. Start a new project in PSpice and draw the circuit in Figure 10. The part name for a capacitor is C. You will need to set the initial voltage of the capacitor. Double click carefully on the capacitor symbol itself (not the value or the name). The property editor spreadsheet will open. Look for the column labeled IC. This is the initial condition. For a capacitor, this is always voltage. For an inductor, of course, IC would be current. Set the value below IC to 0. Click on the tab labeled Page 1 to return to your schematic./nClick PSpice -> New Simulation Profile. A new window will open. Enter a name and click create. Another new window will open (check the icons at the bottom of the screen). Set the following parameters: Analysis type: Time Domain (Transient) Run to Time: 30 seconds Start saving data after: 0 seconds Maximum step size: 0.01 seconds Click OK Put a voltage marker at the top of the capacitor, and run the simulation. The resulting graph will be the capacitor voltage as a function of time. Make sure that this behaves as expected. When does it cross through 2.5 V? What is the capacitor voltage when t = 5RC? b) Print your graph. Delete the voltage marker, and add a current marker to monitor the LED current. Run the simulation again. This time the graph shows the LED current as a function of time, indicating that the LED is off prior to 8 seconds, and on after 8 seconds, as expected. c) Print your graph.See Answer
Q19:Prelab Part 2 In class, we discussed an op amp comparator circuit as shown below in Figure 4. For this circuit, whenever vi > Vref, Vo goes to the positive power rail. Else, v goes to the negative power rail. Throughout this part, assume that the power rails are +5 V. Vi Vref Figure 4. Comparator circuit. Now consider the circuit of Figure 5. a) Which LED will be turned on when v₁ = 1 V? Which LED will be turned on when v₁ = -1 V?/nVi 200 Ω LED 1 W 200 Ω LED 2 Figure 5. Comparator with LEDS. Now consider the circuit of Figure 6. b) Write an equation for v₁ as a function of the pot setting F. Assume F = 0 corresponds to the slider being all the way up. 5 V V1 vi(t) 1 ΚΩ. n(t) 5 V Figure 6. Input signal. To make things more interesting, we add some “noise” to v₁. The resulting "noisy" signal is v₁(t) = v₁ + n(t). Assume that the noise n(t) is a square wave of amplitude vp = 0.1 V (Upp 0.2 V) and frequency f = 2 Hz. Figure 7 shows a graph of vi(t) for a pot setting F = 0.4. Make sure that you understand this figure. Changing the pot setting F will raise or lower the level of the signal in Figure 7. As another example, when F = 0.5, the square wave will be oscillating above and below 0 V, rather than above and below 1 V as shown in Figure 7./n1.0 V ↑vi(t) +0.2 V 0.5 1.0 2.0 t (seconds) Figure 7. "Noisy" signal. Consider now connecting vi(t) in Figure 6 as the input to the circuit of Figure 5. Like the improved volt meter, the input resistance of the comparator is very high. Thus, we do not need to worry about the loading effect. c) What do you expect the LEDs to do for a pot setting of F = 0.4? How about F = 0.5? How about F = 0.6? In class, we also talked about the Schmitt trigger (comparator with hysteresis) which reduces "chattering" due to noise. A Schmitt trigger circuit is shown below in Figure 8. Again, assume power rails of +5 V. d) What is the threshold T for the Schmitt trigger as shown?/nNote that this threshold is larger than upp of the noise in the example above. Thus, any chattering in the example should be eliminated by replacing the comparator with the Schmitt trigger. We will verify this in the lab. 300 ΚΩ ww Vi 20 ΚΩ w Figure 8. Schmitt trigger. νοSee Answer
Q20:Prelab Part 1 In Lab 2, we built a simple volt meter using a d'Arsonval panel meter. We found that the main problem with this simple meter is that its Thevenin resistance is rather small. Because of this, it tends to load the circuit being measured, changing the value of the voltage to be measured. Here, we consider an improved volt meter that uses a 1 mA d'Arsonval panel meter and an op amp as shown in Figure 1. In this figure, assume power rails of +7 V, and -2 V. a) Calculate the value of R required so that i₁ = 1 mA when v₁ = 5 V. b) For the value of R calculated above, write an expression for id as a function of vi. Observe that your equation in b) results in a linearly increasing needle deflection as a function of v₁, with full (100%) deflection at 5 V. Specifically, the current through the panel meter is of the form id = ẞvi. That is, the op amp and resistor form a voltage-controlled current source with the panel meter as its load. An important feature of this circuit is that neither the value that you calculated for R, nor your equation for ia depend on the internal resistance of the panel meter. vi. w R Figure 1. Improved volt meter. In Lab 2, we used your simple meter to measure the voltage at terminals a and b in Figure 2 below. We discovered that your meter performed poorly when RT was not small. Specifically, we saw a large %error for the case of RT = 4.7 kn. This is because the input (Thevenin) resistance of your meter was not very large compared to 4.7 kn./nRecall that an ideal volt meter has infinite input resistance. The input resistance looking into the input of the improved volt meter of Figure 1 is very large. In class, we would model it as infinity. In reality, it is "only" many Meg-Ohms. This results in the %error of the improved meter being negligible for values of RTh up to at least 1 MQ. We will now verify this via a PSpice simulation. RTh w a VTh b Figure 2. Thevenin equivalent circuit. Start a new project in PSpice and draw the circuit shown below in Figure 3. This figure represents the use of the improved meter of Figure 1 attempting to measure vab in Figure 2. The 155 resistor is used to model the panel meter, although this resistance value is unimportant as noted above. As in Prelab 3, use uA741 for the op amp./nStart a new project in PSpice and draw the circuit shown below in Figure 3. This figure represents the use of the improved meter of Figure 1 attempting to measure vab in Figure 2. The 155 resistor is used to model the panel meter, although this resistance value is unimportant as noted above. As in Prelab 3, use uA741 for the op amp. We have not used the Vcc labeling trick this time, and have just allowed wires to cross. Note carefully that PSpice includes a red dot (node) where wires connect. There is no such connection where the negative power supply wire crosses the feedback path. Note also, that this time we have included two parameters (variables). Each of them is created using the new property button in the property editor spreadsheet for the part PARAM, as before. You do not need two copies of PARAM. You will just create two different properties (columns) within the same instance of PARAM. Finally, note that the (default) values of the two parameters should be chosen as vrh = 5 V and Rτh = 1 MQ. Remember that in PSpice, we use "meg" in place of "M." (VTh) V2 PARAMETERS: RTH=1 meg VTh=5 R4 U17 www 3 V+ {RT} 082-46 6 OUT 2 OST40 UA741 V- 2 R2 www R7 ww 155 Put your calculated value of R here No connection here www w R5 7k R6 2k V3 9Vdc/nPerform a linear sweep of RT from 1 k to 1 MQ in increments of 1 k. Note that Vrh will (automatically) stay at its default value of 5 V throughout this sweep. Use a current marker, as shown in Figure 3, to measure the current through the panel meter. The resulting graph will show this current, id, as a function of RT. Ideally, it should be constant at 1 mA, corresponding to 100% needle deflection, since the voltage that the meter is trying to measure is 5 V. In reality, i will decrease very slightly as Rh increases due to the loading effect. c) What value of RT (among those tested) yields the maximum error between id and its ideal value of 1 mA? d) For this value of RT, calculate the %error in id- e) print your graph. Now edit the simulation profile and redo the sweep. This time we will sweep vrh from 0 to 5 V in increments of 0.1 V. The value of RT will (automatically) stay at its default value of 1 M throughout the sweep. You may have to add the current marker again after you edit the simulation profile. Ideally, the graph of the current through the panel meter, id, should rise linearly from 0 to 1 mA, corresponding to a linear needle deflection from 0 to 100%. Your graph should (essentially) show this desired behavior. f) print your graph.See Answer

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