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Q1:35. Develop a truth table for each of the standard POS expressions: a. (A+B)(A+ C)(A + B + C) b. (A+B)(A+B+C) (B. 36. For each truth table in Table 4-15 , derive a standard SOP and a standard POS expression. ABCD X ABCD X 0000 1 0000 0 0001 1 0001 0 0010 0 0010 1 0011 1 0100 0 0011 0100 1 0 0101 1 0101 1 ABC X ABC X 0111 0110 1 0 000 0 001 010 0 000 0 1000 0 0110 0 0111 1 1000 0 1 001 0 1001 1 1001 0 010 0 1010 0 1010 0 011 0 011 0 1011 0 1011 1 100 1 100 0 1100 1 1100 1 101 1 101 1 1101 0 1101 0 110 0 110 1 1110 0 1110 0 111 1 111 1 0 (a) (b) (c) (d)See Answer
Q2:33. Develop a truth table for each of the SOP expressions: a. AB+ ABC + AC + ABC b. XYZ + WZ+XYZ 34. Develop a truth table for each of the standard POS expressions: a. b. (A+B+C (A + B + C) А (A + B + C + D) (A + BSee Answer
Q3:Question 2 Estimate the time delays of the 2 single MOS switches specified as follows. The average current method can be used. Both transistors are sized 1 μm/2μm, and the capacitance at the Vo node is 50 fF. (1) Find Atiti - to, the time required for Vo to change from 0 V to VDD/2, when the switch is NMOS. Vin VGn= VDD Vin⭑ VDD 0 to Vo Vo Vo(t>>to) 0.5VDD- 0 ti (2) Find At2 = tb ta, the time required for Vo to change from 0.1 VDD to 0.9VDD, when the switch is PMOS. Vin Vin VDD VGP= 0 V Vo 0 to Vo 0.9VDD 0.1VDD 0 ta th Vo(t>>to) tSee Answer
Q4:Q1: Find the voltage Vx a. Using Node analysis b. Using Mesh analysis 120 ww 1 c. Using Superposition d. By finding the Thevenin equivalent circuit (R₁ 60 40 is the 42 resistor) www www Vx- 12 V 2 24 V Super lechSee Answer
Q5: ميرولد و المعلمين T King Fahd University of Petroleum and Minerals Department of Electrical Engineering EE464 High Voltage Engineering Assignment No. 1 Instructor: Dr. Umer Amir Khan Total Marks: 10 Question #01: Study Section 2 “Conduction and Breakdown in Gasses” and write very brief notes on the following topics. The notes should include your understanding and appropriate drawing: 1. What are the three types of Ionization mechanisms? Explain each mechanism with the help of diagrams. 2. How is an electron avalanche formed? Explain with the help of diagram. Why space charge is formed in Electron Avalanche? 3. What is the effect of space charge formed in Electron Avalanche? Explain with the help of diagrams. 4. Explain the streamer breakdown with the help of diagrams. 5. Explain briefly the townsend mechanism and streamer mechanism during breakdowns. 6. Explain Paschen's law with the help of diagram. Label the diagram properly 7. Explain the critical steps in the breakdown during an extremely non-uniform field with the help of diagram. Also label the diagram showing the breakdown. **INSTRUCTIONS** . • Do not copy the Assignment from each other Find the answers from the Class Notes and write the answers yourself. • The figures included should be drawn by you. • You need to submit the assignment on Blackboard. • If done by hand, please submit the scanned copy on blackboard. The Presentation and Neatness of the Assignment also carries marksSee Answer
Q6: ECE 322L - Lab 2 Goal In this lab you will gain understanding of nmos transistor regions of operation, analyzing the IV characteristic curves, gain experience modeling using PSPICE, MultiSim, or your preferred simulation software, and verify your hand analysis of the circuit. Equipment needed ☐ Lab notebook, pencil ☐ Agilent Digital Multimeter AgilentVariable Power Supply ☐ ☐ BNC/EZ Hook test lead ☐ Banana Clips Parts needed ☐ Circuit breadboard ☐ ☐ ☐ ☐ Lab parts kit Transistor, N-MOS, BS170 Jumper wires Resistors: 1ΚΩ, 6.2ΚΩ, 0.5 ΚΩ Software needed ☐ PSpice or MultiSim The Lab H|| 3 V Rd 1ΚΩ BS170 R2 6.2ΚΩ Rs 50.5ΚΩ Fig1: Circuit Diagram Part 1 Perform hand analysis of the given circuit (Figure 1). Use the values K'n = 1.825 mA/v^2, (W/L) = 1 and VTN=1 in your hand calculations. What region of operation (Cut-off/Saturation/Linear) is the device in? Construct the circuit using BS170 NMOS transistor and given resistor values. Test the circuit at varying VDD and graph ID VS VDD. • Include a sketch of the load line in your report. • Simulate the circuit using your preferred software. Compare the results between your hand calculations, model, and measurements ○ Be sure to list IDQ, VDSQ, and VGSQ at the given VDD. О What could be the cause of differences in the three different measurements? Part 2 • How could we change the operating region of the transistor? Develop a hypothesis, and then perform hand calculations to verify it. Provide a circuit diagram of your modified circuit ○ Include your calculations for IDQ, VDSQ and VGSQ at a specific VDD. Plot the load line and Q-point for your chosen VDD. Extra Credit • Build the modified circuit, о Make sure the device parameters can handle the new currents and voltages. Test the circuits lÅ with varying VDD. Graph the results. Make a table comparing the measured values against the hand calculations for IDQ, VDSQ and VGSQ at a specific VDD. Note: Please only include the Pspice code you used, and applicable output values in your report. You do not need to copy the entire output file into your report. Make sure to include a circuit diagram with the nodes you used in your code labeled. For MultiSim, please provide screen captures of the measurements. Clean your lab space After you have finished the lab, put away all materials you were using in the proper places. Make sure the lab area is clean. Failure to follow proper lab etiquette will result in deductions on your lab report grade. Lab 2 Rubric Requirement: Part 1: a. Hand Calculations and Region of Operation (20 points) b. Graph of ID Vs. VDD (20 points) c. Load line and Q-point Sketch (15 points) d. Compare and explain difference hand/measured/simulated results (20 points) Part 2: a. Hypothesis and hand calculations (10 points) b. Quiescent Values (5 points) c. Load line with Q-point (10 points) Extra Credit a. Graph of ID Vs. VDD (5 points) between b. Table comparison of measured and hand calculations quiescent values (5 points) Possible Points (100) 75 25 10 extraSee Answer
Q7:Problem 8 (10 points). Find the current I2 in the circuit below. 12 50 Q 60 V 40 Ω 45 A 12 QSee Answer
Q8:Problem 3 (8 points). Determine the current through the 2 Ohm resistor assuming the voltage between terminals A and B is 2 V. You can use any method you wish. A. 892 W 692 W 892 4Ω 2Ω W-W 652 W W 492 BSee Answer
Q9:4.22 Listed below are the results of measurements taken on several different junction diodes. For each diode, the data provided are the diode current I and the corresponding diode voltage V. In each case, estimate I,, and the diode voltage at 10/ and //10. (a) 10.0 mA, 700 mV (b) 1.0 mA, 700 mV (c) 10 A, 800 mV (d) 1 mA, 700 m V (e) 10 µA, 600 mVSee Answer
Q10:Objectives After completing this experiment, you will be able to Convert binary or binary coded decimal (BCD) numbers to decimal. Construct a portion of a digital system that decodes a BCD number and displays it on a seven-segment display. Troubleshoot the circuit for simulated faults. Materials Needed Four LEDs 7447A BCD/decimal decoder MAN72 seven-segment display Four-position DIP switch Resistors: eleven 330 £2, one 1.0 k For Further Investigation: Additional LED One 330 2 resistor Summary of Theory The number of symbols in a number system is called the base, or radix, of that system. The dec- imal number system uses ten counting symbols, the digits 0 through 9, to represent quantities. Thus it is a base ten system. In this system, we represent quantities larger than 9 by using positional weight- ing of the digits. The position, or column, that a digit occupies indicates the weight of that digit in determining the value of the number. The base 10 number system is a weighted system because each column has a value associated with it. Digital systems use two states to represent quantities and thus are binary in nature. The binary counting system has a radix of two and uses only the digits 0 and 1. (These are often called bits, which is a contraction of BInary digiT). It too is a weighted counting system, with each column value worth twice the value of the column to the immediate right. Because binary numbers have only two digits, large numbers expressed in binary require a long string of Os and 1s. Other systems, which are related to binary in a simple way, are often used to simplify these numbers. These systems include octal, hexa- decimal, and BCD. The octal number system is a weighted number system using the digits 0 through 7. The column values in octal are worth 8 times that of the column to the immediate right. You convert from binary to octal by arranging the binary number in groups of 3 bits, starting at the binary point, and writing the octal symbol for each binary group. You can reverse the procedure to convert from octal to binary. Simply write an equivalent 3-bit binary number for each octal character. The hexadecimal system is a weighted number system using 16 characters. The column values in hexadecimal (or simply hex) are worth 16 times that of the column to the immediate right. The characters are the numbers 0 through 9 and the first six letters of the alphabet, A through F. Letters were chosen because of their sequence, but remember that they 21/nare used to indicate numbers, not letters. You convert binary numbers to hexadecimal numbers by arranging the binary number into 4-bit groups, start- ing at the binary point. Then write the next symbol for each group of 4 bits. You convert hex numbers to binary by reversing the procedure. That is, write an equivalent 4-bit binary number for each hexadeci- mal character. The BCD system uses four binary bits to rep- resent each decimal digit. It is a convenient code because it allows ready conversion from base ten to a code that a machine can understand; however, it is wasteful of bits. A 4-bit binary number could repre- sent the numbers 0 to 15, but in BCD it represents only the quantities 0 through 9. The binary repre- sentations of the numbers 10 through 15 are not used in BCD and are invalid. The conversion of BCD to a form that can be read by humans is a common problem in digital systems. A familiar display is called the seven- segment display, which is used in many digital ap- plications such as clocks. A basic seven-segment display is described in this experiment with the instructions for wiring it. Later, in the text, the inner workings of the decoder and seven-segment display are explored. The block diagram for the tablet-bot- tling system that was introduced in Chapter 1 is an example of a small system that used a BCD to seven-segment conversion circuit (see Figure 1-27 of the text). It is used in both the on-site display and the remote display portions of that system. You will construct a simplified version of the display for this experiment. 21 Procedure 1. Take a moment to review "Circuit Wiring" in the Introduction before constructing the circuit in this experiment. The pin numbers for the integrated circuits (ICs) in this and succeeding experiments are not shown; pin numbers may be found on the data sheets in Appendix A or on the manufacturer's website. It is a good idea to write the pin numbers directly on the schematic before you begin wiring. 2. Begin by constructing the circuit shown in Figure 3-1, which will represent a BCD input. After wiring the circuit, connect power and test each switch to see that it lights an LED. 3. Remove power and add the circuit shown in Figure 3-2. An example of the wiring is shown in Figure 3-3. If you have not already done so, write the pin numbers on the schematic. The pin numbers for the MAN72 display are shown in Figure 3-4.* Note that the 7447A has 16 pins, but the MAN72 has only 14 pins. Before applying power, check that you have connected a 330 2 current-limiting resistor between each output of the decoder and the input to the MAN72. Connect the Lamp test, BI/RBO, and RBI inputs through a 1.0 k2 resistor to +5.0 V. This is a pull-up resistor, used to assure a solid logic HIGH is present at these inputs. *Pin numbers for the 7447A decoder can be found in Appendix A./nEvaluation and Review Questions 1. Assume the switches in Figure 3-2 are set for a binary 1000, but the display shows a zero. What are three possible causes for this error? 2. Looking at the possible causes for an error from Question 1, how would you go about troubleshooting the problem? 3. Suppose that the BI/RBO input line was shorted to ground on the 7447A decoder and all other input lines were okay. Looking at the function table for the 7447A in Appendix A, determine the effect this would have on the display. 4. Explain the difference between binary and BCD. 5. Convert each number shown into the other bases: Binary 01001100 Octal 304 Hexadecimal E6 Decimal 57 BCD 0100 1001 6. a. The decimal number 85 is equal to 125 in a certain other number system. What is the base of the other system? b. The decimal number 341 is equal to 155 in a certain other number system. What is the base of the other system?See Answer
Q11:Find the Thevenin equivalent with respect to the terminals a, b for the circult 9V 50 LSA 100 onSee Answer
Q12:EET 3150 Exam 1 1. Find the equivalent resistance 1402 IOA 600 www 1052 250 MdD ACCA 560 402 w $150 120 14400 w 120See Answer
Q13:1. 2. 3. EE4001 Electrical Engineering 1 Lab 02: Wheatstone Bridge Mark Halton Objective: Introduce students to the operation of the Wheatstone Bridge. Lab Prep Checklist: In advance of the lab: Read the lab document-focus on the circuits, formulae, procedure, and photos. Draw circuits and write out the formulae in your dedicated lab book. Attempt theory calculations for Circuit 1 and Circuit 2. Run and edit the SIMetrix file for Circuit 1. Create your own SIMetrix file for Circuit 2. Reference the support documentation for Tinkercad and build Circuit 1 and Circuit 2. V Equipment: Power Supply; Breadboard; Resistors; 1k0 Potentiometer; Multimeter; Leads. V V V V V The lab prep tasks must be completed by each student in a dedicated lab book. There will be penalties applied to lab report grades if lab prep is not completed or insufficient. Lab prep will provide insight into the experimental measurements you expect to record. You must take photos of each circuit (& readings) to provide evidence of your experimental practice. Ensure to include your Student ID in each photo./n4. Rx Procedure: Using the lab equipment provided, build Circuits 1 and 2 in turn. For each circuit, use the Multimeter to measure (set) the resistance of the potentiometer (Rx) to 1k (as close as possible). Ensure to select the resistance (2) button on the Multimeter. ul.ie When the resistance Rx is set, use the Multimeter to measure the voltage at point A (VA) and point B (VB). Determine the voltage VAB = VA-VB. For Circuit 2, ensure to measure the voltage Vx. For each circuit, also measure the currents (I, 11, 12). Repeat these same measurements for Rx set to 7500 and then to 10500 (as close as possible). Lastly, twist the dial of the potentiometer to set Rx to an unknown resistance value and leave it at this value for both circuits. For each circuit, take the same voltage & current measurements as before. Ensure all results are presented clearly in tabular format for each circuit as shown. Ensure to add an extra column for voltage Vx for Circuit 2. 1k0 7500 10500 VA Table: Calculated and Measured Results [Circuit_]. Theory Measured VB VAB 11 Theory Measured Theory Measured Theory Measured Theory 12 Measured 2 of 5/nCircuit 1: Circuit 2: ul.ie 10V Vin 10V OV if VA = 0, if R₁ R₂ R₂ = R₁ OV 1k0 RD VAB=VA-V₂ 11 then R1 VA R₂ R₂ h R1 VA - 1k0 RI 1k0 R₂ then Van = Vin (RR) R+R₂ 1k0 Rx 1k0 R2 1k0 Rx Lo VB Vx 1k0 to Va 3 of 5/nul.ie 5. . 6. 7. 8. 3 of 5 Analysis & Discussion: With reference to Circuit 1, comment on your observations when Rx is nominally set to 1k0. Describe what happens when the value of Rx is changed to 7500. Describe what happens when the value of Rx is changed to 10500. For the unknown value of Rx, describe and demonstrate how the voltage readings you take can determine Rx. Repeat the same steps for Circuit 2. Record and explain the different results that you obtain. In particular, you should explain why changing the value of Rx will have an effect on the voltage Vx. Further Considerations: Where have Kirchoff's current and voltage laws been demonstrated? Where have the voltage divider law and current division law been demonstrated? How does the Wheatstone Bridge allow you to determine an unknown value of resistance? Conclusions: The conclusions should complete your report and should state if the objectives for the lab have been achieved or otherwise. Lab Reports: All lab reports should be written in the third person. Your lab report should be submitted as a .pdf document (not a MS Word.docx) in Brightspace. Submission deadline is usually one week after the final group have completed this lab.See Answer
Q14:Deliverables: 1) Read the lab manual. 2) Follow all the steps. 3) Need to make a lab report. 4) Data is provided (for each circuit just include 2 photos from the photos pdf attached). 5) Lab report should be systematic order. 6) Follow the submission instructions as well.See Answer
Q15:PART 2: PSPICE SIMULATIONS: A. SCHEMATIC: Submit your PSpice schematic clearly showing all values for DC voltage, DC current and DC Power for each element. All resistor values must clearly be shown on the schematic. B. SIMULATED DC BIAS: What are the simulated DC bias parameters, ICQ, VCEO, VBEQ and transistor Power Dissipation, PD, transistor? Submit a table comparing your hand- calculated values to the simulated values for Ico, VCEO, VREQ, and PD, transistor. C. SIMULATED POWER SUPPLY BIAS: What is the total current delivered from the supply, Irs? Did you achieve the specification for maximum current? D. SIMULATED CURRENT SWING: Simulate your design in PSpice using a 1kHz sinusoidal input, use a voltage source with a 1K source resistor as shown above. Place a current probe on the wire leading into your circuit (on the left side of the capacitor). What is the largest peak-to-peak swing in the output current, i, through the 64 ohm load resistance? To find the maximum swing, you should slowly increase the source amplitude until the output current waveform begins to clip at the top or the bottom. Unless you have a design optimized for maximum symmetrical swing, it's most likely that the clipping will not be symmetrical. In other words, the point of clipping in the positive peak current will be different from the negative peak current. Submit a plot showing it with clipping using a B-200. When clipping occurs, chose the smaller of the two values and double this value, this is the peak-to-peak swing in the output current, IL. Clearly report this peak-to- peak swing in the output current, L. Did your design achieve the 100mA peak-to-peak swing? E. SIMULATED EFFICIENCY: Using the peak swing in load current, it (just below clipping), and load resistance, 64 ohms, calculate the simulated power conversion efficiency, n? You will need the total power supply current, Ips, from your simulation. Show all your calculations using data recorded from your simulated plots. Compare the hand-calculated value to the simulated value. F. SIMULATED SMALL SIGNAL OPERATION: Using PSpice, reduce the input source amplitude so that it is should be small enough to operate your transistor in the small signal region. Verify that the peak AC voltage across the Base-Emitter (B-E) junction, Vie, is less than 2.6mV peak (<<26mV). In OrCAD, you can verify the voltage using the "Differential Voltage Probe" measurement or just take the difference between two voltage probes placed at the base and the emitter. If vie is greater than 2.6mV, decrease the source amplitude until the B-E voltage is in the small signal range. Record the amplitude value of the source voltage for small signal operation. Submit a plot showing of the for B-200./nG. SIMULATED GAIN: Using the input source with amplitude set to the value found in part (F), what is the small signal gain, A₁ =, at ß- 200? Submit two plots showing is and it under small signal conditions using a B-200. Edit the transistor model and change the value for 3 to 100 and then to 300, record the small signal gain for each condition. What is the variation in the current gain, A₁ =, when ß is varied over the range from 100 to EE3124 Project #1 -Fall 2023 Rev 0.0 Class A Power Amplifier Design 300? Submit a table showing current gain, A₁ = for B-100, 200 and 300. What is the % variation in your gain across this range in B (relative to B-200, percent variation is calculated using (simulated-target x100%))? H. SIMULATED INPUT RESISTANCE: Using the source amplitude found in part (F), what is the simulated input resistance, Rin, to your amplifier? Using current and voltage test probes at the amplifier input to calculate the input resistance using PSpice by placing cursors at the peak of each sinusoidal waveform and dividing the voltage result by the current. Note that the placement of V/I probes on the schematic in circuit areas where there is DC voltage and/or DC current will result in a DC offset in the simulated measurements, if so, either move the probe or subtract the DC offset from the results. Submit two plots showing the voltage and current waveforms used to calculate Rin having ß-200. Submit a table comparing your hand calculation and PSpice value for Rin. Submit a table showing PSpice values for Rin with ß-100, 200 and 300. I. SIMULATED OUTPUT RESISTANCE: What is the output resistance, Rout, to your amplifier? Replace the 64 ohm load with a voltage source at the output of your amplifier (leave the coupling capacitor between the source and the circuit). Remove the input voltage source and replace with a short (vi-0). Using current and voltage test probes at the amplifier output, calculate the output resistance, Rout, using PSpice by placing cursors at the peak of each waveform and dividing the voltage result by the current. The voltage source should have a low amplitude to maintain a small signal condition. Submit the PSpice schematic of your test circuit. Submit a plot showing vo and io on two separate graphs for ß-200. Submit a table showing Rout for ß- 100, 200 and 300. J. SIMULATION USING STANDARD RESISTOR VALUES: Using your PSPICE design, substitute standard resistors into your model by rounding up or down to the nearest values. The standard resistor values are listed in Appendix A noting there are two columns, one for 1/2 watt and one column for 3W. Match the resistance and associated power requirements to your design. SUBMIT the schematic with Standard Resistors. Using B-200, simulate the peak-peak current swing, small signal current gains and input resistance. Submit a table, comparing PSpice results for Vcc, Ico, VCEQ, PD, transistor with original resistors and the standard value resistors./nK. Submit a plot showing it with clipping at both the positive and negative peaks using a B -200. Submit plots of is and it under small signal conditions, calculate A₁. Submit plots of fin and vin under small signal conditions, calculate R. Submit a table comparing the simulated peak swing, the simulated small signal gain and input resistance for your original design and the design with standard resistors. L. COMPONENT BILL OF MATERIALS (BOM) FOR LAB EXPERIMENT #3: Create the BOM, with standard resistor values (ohms), the quantities for each type of resistor and the required power spec (½ watt or 3 watt). Include the BOM in your project submission and also upload your BOM to Brightspace Assignments. The BOM must be received by Wednesday, October 4 at noon. Use the BOM form posted on Brightspace./nAFFENS Anderd Hedar ValSee Answer
Q16:4.9 Assuming that the diodes in the circuits of Fig. P4.9 are ideal, find the values of the labeled voltages and currents. +3V 12 ΚΩ D₁ D₂ Figure P4.9 -OV 6 kn -3V (a) +3V 6 kn D₁ D₂ -3V (b) OV 12 ΚΩSee Answer
Q17:4.4 In each of the ideal-diode circuits shown in Fig. P4.4. v, is a 1-kHz, 5-V peak sine wave. Sketch the waveform resulting at v. What are its positive and negative peak values? 20 Figure P4.4 D₁ ▷ (a) www.11 I kn 20 20 D₁ D₂ KK (b) www I kn 01/20 D₁ D₂ KD (c) www11 ΙΚΩ VoSee Answer
Q18:4.3 For the circuits shown in Fig. P4.3 using ideal diodes, find the values of the labeled voltages and currents. +1 Vo +2 Vo Figure P4.3 D₁ ▷ ▷ D₂ (a) 2 ΚΩ -3 V +1 Vo +2V0- KI K D₂ (b) +3 V 2 ΚΩ ovSee Answer
Q19:D 2.61 Using the difference amplifier configuration of Fig. 2.16 and assuming an ideal op amp, design the circuit to provide the following differential gains. In each case, the differential input resistance should be 20 ks2. (a) 1 V/V (b) 5 V/V (c) 100 V/V (d) 0.5 V/V R₁ Uom R₂ Uno- www R₁ R₂ Vo Figure 2.16 A difference amplifier.See Answer
Q20:2.49 Derive an expression for the voltage gain, v/v,, of the circuit in Fig. P2.49. + V/₁ R₁ www www R₂ Figure P2.49 www R₁ R₂ wwww + VoSee Answer

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