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Expert help when you need it- Q1:Design an n-channel Silicon JFET with a Pinch off voltage of -20 V with following constraints: Gate width = 0.1 cm Use only Phosphorous or Born dopants Physical design parameters must be reasonable and feasible for JFET fabrication Hand Calculations: a) Must tabulate all parameters obtained, the device geometry as well as any other unknown parameters such as the channel thickness, channel length, doping densities, carriers' mobility, built-in potential, and turn off voltage (VT). b) Calculate substrate's resistance used. c) Calculate IDsat and VDsat for VG at 0 V, -5 V, -10 V, -15 V, must tabulate. ORCAD: d) Submit Library file for JFET e) Examine (hand-calculated) VT from part (a) f) Examine results in part (c) show both hand calculations and ORCAD on graphSee Answer
- Q2:生。 Vin Required Value (V) Vin 5 VOL M2 The given circuit is for Complementary CMOS inverter. It has the following parameters: Wn-10.0 µm, Wp-30.0 μm,L=2 μm, VDD-4V, Kn'- 100 μA/V², Vin-1.0 V, Kp'-50 μA/V² and Vtp= -1.0 V 2. Plot ID versus Vin. (plot(Yourname)+data on the plot) 3. Determine the static power dissipation. Paov Required Value P@VOH VDD Using ORCAD/Ltspice: 1. Remove C1, plot Vout versus Vin and determine VIL, VIH, VOL and VOH. YOUR Answer should includ: (Circuit(Yourname)+plot(Yourname)+data on the plot +Fill-in the table below) VOH VIL VIH NML Vout C1 0.5p Pstatic(average) NMH PeakSee Answer
- Q3:ORCAD: d) Submit Library file for JFET e) Examine (hand-calculated) Vr from part (a) f) Examine results in part (c) show both hand calculations and ORCAD on graphSee Answer
- Q4:For Task#1: Set Vin to VDC of 0V and Do DC sweep of Vin from 0 to the value of 3 in increment of 0.1 and plot Vo versus Vin to get the requirements.See Answer
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