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  • Q1:• Design a positive edge-triggered flip- flop, and verify its operation with simulations. Measure its current consumption, setup time, and hold time through simulation. 。 Turn in: ☐ Flip flop schematic ■ Test bench schematic ☐ ■ Simulation wave form showing proper operation. This simulation should show D transitions during both CLK=1 and CLK=0 phases to show that the device is truly edge-triggered (i.e. that it does not have a transparent phase); and 1=>0 and 0=>1 output transitions on clock edges. ■ Simulation results showing the relationship between tDC and tcQ and illustrating how you determined tsetup and tpcq ■ Simulation results showing the relationship between tCD and tcQ and illustrating how you determined thold. ■ A table showing current consumption IDD, setup time tsetup, hold time thold, and Clk-Q dolovtSee Answer
  • Q2:5. Cadence: Draw a schematic for a NOR-2 gate. Construct a layout of the gate using the Cadence layout editor. Verify the layout using LVS and DRC, ensuring that there are no DRC violations and that LVS indicates a match. Turn in the schematic, layout (export using 'File->Export image' rather than screen capture), and an image of the LVS and DRC results. • Here is a tutorial on layout, broken into three parts: 。 layout tutorial_part1 creation.m4v O layout tutorial_part2 drc.m4v 。 layout tutorial part3 lvs.m4v 6. Cadence. Measure the rising-output propagation delay tp, LH of your gate with no load (i.e. nothing connected to the output), with 1,2,4, and 8 identical copies of itself as the load. Connect one input of the load gate(s) to the gate under test and ground the other input. How does your measurement compare to expectations?See Answer
  • Q3:/nThe special project uses the Cadence tools that you used in your Labs. In this project you will create a crossbar array of resistors driven by a simple DC volage source for input and a grounded node where the output current is measured. The current through each resistor and the voltage for each wire are measured and entered in the table for the appropriate case. Also, measure the total current to ground out Va. There are three tables for the three cases: Case 1 has all of the resistors with a low resistance value which is given in the table for Case 1. Case 2 has all of the resistors with a high resistance value which is given in the table for Case 2. Case 3 has specific resistance values for each student which needs to be recorded in the table by the student. For Memristor Project 1 use a 3x3 array of resistors as shown below. Va Gnd lout Vb measured Measured Vc M3a M3b M3c Se Maa M2b M2c មាណវ mus M1b M1cSee Answer

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