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3. Optional Extra credit: (5 pts)

Going back to lecture 9, slide 10. Assuming you only have an 8-bit machine, write the code to

implement a 16-bit number multiplied by an 8 bit number as shown on slide 10 of lecture 9. Do

something similar to what we did in class. (hint-the math is done for you on slide 10 of lecture

9). I've shown it below in Hex and binary. Write the 16-bit result to memory.

01100100 (bin)

1010 (bin)

0x64

x 0xA

or

x

Fig: 1


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3. Create a new project Lab5c. Starting with the files provided and the program in Figure 5.1, modify that program so that all the following changes are made in your new program: a. The table to be copied is of length 0x20. b. The original table is created starting at 0x2000.0480 c. The table starts with 0x00 and successive even numbers are stored in the table. d. The duplicate table is created starting at Ox2000.0C00 e. The duplicate table contains the copy of the original table in the reverse order.


Exercise 6.8 Show how the strings in Exercise 6.6 are stored in a byte-addressable memory on (a) a big-endian machine and (b) a little-endian machine starting at memory address 0x1000100C. Use a memory diagram similar to Figure 6.4.Clearly indicate the memory address of each hvte on each machine.


1. Calculate the 1 GHz impedance of a 100 Microfarad Capacitor with a ½ inch lead on each end. Assume resistance is essentially zero and inductance of connecting lead is 20 nanoH/inch.


12. Figure 1-17a shows the block diagram for a Synchronous RAM. Use the rules we gave you for analyzing multi-level circuits with bubbles to help you write the logic expression for the signals that assert the CLR# signal in the Burst Counter.


15. Assuming that the multiplexers in Figure 1-11c are in the up position so the circuit functions as a simple shift register, calculate the maximum clock frequency assuming that the top of the flip flops is 2ns, the tsu of the flip-flops is Ins, and the top of the multiplexers is 1ns.


17. Describe what is required to convert an asynchronous memory device to a synchronous memory device and bri20ly describe the advantages that a synchronous SRAM has over an asynchronous SRAM with respect to data transfer rates.


2. Write an MSP432 code segment that subtracts two 64-bit Hexadecimal numbers and stores the 64-bit binary value starting at 0x20000008. Subtract 0x0000 0000 9FED CBAO from OxABCD EF98 7654 3210. You can make it a continuation of the program in problem 1, but let me know that is what you are or are not doing. (write a small note). Enter the code into your lab tools (one of your assembly uVision programs) and cross check your answer. Include a printout or picture of your source assembly file with the final answer [15 pts]


19. Briefly describe the two major techniques used by DDR DRAMs to achieve a data transfer rate that is two times the rate that would be possible without the use of these techniques.


1. Write an MSP432 code segment that adds the 64-bit hexadecimal numbers: 0x1234 5678 9FED CBAO and OxABCD EF98 7654 3210 together and store the 64-bit binary to memory location starting at 0x20000000. Enter the code into your lab tools (one of your assembly uVision programs) and cross check your answer. Include a printout or picture of your source assembly file with the final answer [15 pts]


4. What would be the impedance of 10 of these 0.1 capacitors in parallel? How effective do you think these 10 in parallel would be in bypassing 1GHz spikes and harmonics?