An asynchronous finite state machine (FSM), with six states1, 2, 3, 4, 5 and 6, is described by the primitive flow table in Figure4.a) i. Minimize the number of states

in the FSM and explain the methods you use. ii. Derive the Boolean equations for the combinatorial logic needed to implement the FSM. b) A serial multiplier circuit is constructed from a 4-bit binary adder and registers to produce an 8-bit unsigned product from two4-bit input words. Assuming that there is no special register for a carry bit, show the contents of the registers step by step when the multiplier is used to multiply 11 by 13. If a system is designed for multiplying large matrices, such as in graphics processing, is it better to use serial or parallel multipliers in the system2 Why?