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Use the following module interface (which you can find in the provided file):
module NextPCLogic(NextPC, CurrentPC, SignExtImm64, Branch, ALUZero, Uncondbranch);
input [63:0] CurrentPC, SignExtImm64;
input Branch, ALUZero, Uncondbranch;
output [63:0] NextPC;
reg [63:0] tmp;
/* write your code here */
endmodule
Branch (CBZ) is true if the current instruction is a conditional branch instruction, Uncondbranch is
true if the current instruction is an Unconditional Branch (B), and ALUZero is the Zero output of the
ALU.
A template and testbench are provided (If you work on Vivado, comment out the include
command at the very top). Complete the next pc logic; add a few test cases to the testbench to
improve it.
Demonstrate your program to the TA.
Attach a zip/tar file containing your completed module, testbench and a screenshot of the
waveform.
NextPClogic.v↓↓
NextPClogicTest.v
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Question 2
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Write a behavior model to calculate the next PC for an instruction. It will use information from the
processor control module and the ALU to determine the destination for the next PC. It will contain
two adders for calculating the two possible NextPC and choose between the two possibilities using
the logic depicted below.
memory
Regi:00
studion Dif
[Parucion H
-
Uncondbranch
Branch
""!!
data Reg
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Add ALU
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20 pts
Zero
2 Maps
Fig: 1
Fig: 2